10GbE XGMII TCP/IPv4 packet generator for Verilog
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Updated
Jan 28, 2025 - C++
10GbE XGMII TCP/IPv4 packet generator for Verilog
Third project of 2023-2024 year which aims creating our own assembly language, with an interpreter to be able to read and run our programs. 📎
A virtual processor with its own Assembly language made in C. We made it as a team, designing each part of it from scratch.
TAYLOR: TernArY virtuaL prOcessoR
[ABANDONED] A small product of boredom. Incomplete and abandoned.
This is virtual machine named Ameer Virtual Processor to which languages can be compiled to, and be ran on. This runs well with either Nuitka or PyPy
[ABANDONED] Just another product of boredom.
Stack-based virtual processor and code assembler/disassembler to it.
Custom virtual CPU running in the browser
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