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…nt regions.

This is a workaround to support verilog modules with multiple always_ff regions

Example rewrite

  moore.module @bug(...) {
    moore.procedure always_ff {
      moore.wait_event {
        %3 = moore.read %wr_clk_0 : <l1>
        moore.detect_event posedge %3 : l1
      }
      ... // A
    }
    moore.procedure always_ff {
      moore.wait_event {
        %3 = moore.read %wr_clk_0 : <l1>
        moore.detect_event posedge %3 : l1
      }
      ... // B
    }

  ~>

  moore.module @bug(...) {
    moore.procedure always_ff {
      moore.wait_event {
        %3 = moore.read %wr_clk_0 : <l1>
        moore.detect_event posedge %3 : l1
      }
      ... // A
      ... // B
    }
    ...

…nt regions.

This is a workaround to support verilog modules with multiple
always_ff regions

Example rewrite

```
  moore.module @bug(...) {
    moore.procedure always_ff {
      moore.wait_event {
        %3 = moore.read %wr_clk_0 : <l1>
        moore.detect_event posedge %3 : l1
      }
      ... // A
    }
    moore.procedure always_ff {
      moore.wait_event {
        %3 = moore.read %wr_clk_0 : <l1>
        moore.detect_event posedge %3 : l1
      }
      ... // B
    }

  ~>

  moore.module @bug(...) {
    moore.procedure always_ff {
      moore.wait_event {
        %3 = moore.read %wr_clk_0 : <l1>
        moore.detect_event posedge %3 : l1
      }
      ... // A
      ... // B
    }
    ...
```
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