From bc70c4a9efdb25495ef33bd32ecb349686d04ca0 Mon Sep 17 00:00:00 2001 From: Emma Pilkington Date: Wed, 9 Jul 2025 12:20:01 -0400 Subject: [PATCH 1/4] [AMDGPU] Emit entry function Dwarf CFI Entry functions represent the end of unwinding, as they are the outer-most frame. This implies they can only have a meaningful definition for the CFA, which AMDGPU defines using a memory location description with a literal private address space address. The return address is set to undefined as a sentinel value to signal the end of unwinding. Co-authored-by: Scott Linder Co-authored-by: Venkata Ramanaiah Nalamothu --- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 57 +- llvm/lib/Target/AMDGPU/SIFrameLowering.h | 6 + .../memory-legalizer-atomic-fence.ll | 480 ++++++ .../av-spill-expansion-with-machine-cp.mir | 8 + .../branch-folding-implicit-def-subreg.ll | 2 + .../test/CodeGen/AMDGPU/dbg-info-inline-at.ll | 2 + llvm/test/CodeGen/AMDGPU/debug-frame.ll | 1405 +++++++++++++++++ .../eliminate-frame-index-s-add-i32.mir | 124 +- .../eliminate-frame-index-s-add-u32.mir | 24 +- ...minate-frame-index-v-add-co-u32-wave32.mir | 28 +- .../eliminate-frame-index-v-add-co-u32.mir | 140 +- .../eliminate-frame-index-v-add-u32.mir | 216 ++- .../CodeGen/AMDGPU/entry-function-cfi.mir | 34 + .../frame-index-elimination-tied-operand.mir | 2 + .../CodeGen/AMDGPU/inflate-av-remat-imm.mir | 6 + ...sue98474-assigned-physreg-interference.mir | 2 + ...egrewriter-live-out-undef-subregisters.mir | 10 + .../AMDGPU/kernel-mubuf-with-voffset.mir | 2 + llvm/test/CodeGen/AMDGPU/llvm.dbg.value.ll | 2 + ...al-regcopy-and-spill-missed-at-regalloc.ll | 4 + .../AMDGPU/pei-reg-scavenger-position.mir | 2 + .../regalloc-introduces-copy-sgpr-to-agpr.mir | 2 + .../sgpr-spill-dead-frame-in-dbg-value.mir | 2 + llvm/test/CodeGen/AMDGPU/sgpr-spill.mir | 12 + .../CodeGen/AMDGPU/spill-special-sgpr.mir | 6 + .../transform-block-with-return-to-epilog.ll | 8 + 26 files changed, 2547 insertions(+), 39 deletions(-) create mode 100644 llvm/test/CodeGen/AMDGPU/debug-frame.ll create mode 100644 llvm/test/CodeGen/AMDGPU/entry-function-cfi.mir diff --git a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp index aa5ea77f17291..699194faf0470 100644 --- a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp @@ -12,8 +12,10 @@ #include "GCNSubtarget.h" #include "MCTargetDesc/AMDGPUMCTargetDesc.h" #include "SIMachineFunctionInfo.h" +#include "llvm/BinaryFormat/Dwarf.h" #include "llvm/CodeGen/LiveRegUnits.h" #include "llvm/CodeGen/MachineFrameInfo.h" +#include "llvm/CodeGen/MachineModuleInfo.h" #include "llvm/CodeGen/RegisterScavenging.h" #include "llvm/Target/TargetMachine.h" @@ -43,6 +45,15 @@ static MCRegister findUnusedRegister(MachineRegisterInfo &MRI, return MCRegister(); } +static bool needsFrameMoves(const MachineFunction &MF) { + // FIXME: There are some places in the compiler which are sensitive to the CFI + // pseudos and so using MachineFunction::needsFrameMoves has the unintended + // effect of making enabling debug info affect codegen. Once we have + // identified and fixed those cases this should be replaced with + // MF.needsFrameMoves() + return true; +} + // Find a scratch register that we can use in the prologue. We avoid using // callee-save registers since they may appear to be free when this is called // from canUseAsPrologue (during shrink wrapping), but then no longer be free @@ -615,10 +626,39 @@ void SIFrameLowering::emitEntryFunctionPrologue(MachineFunction &MF, const SIRegisterInfo *TRI = &TII->getRegisterInfo(); MachineRegisterInfo &MRI = MF.getRegInfo(); const Function &F = MF.getFunction(); + const MCRegisterInfo *MCRI = MF.getContext().getRegisterInfo(); MachineFrameInfo &FrameInfo = MF.getFrameInfo(); assert(MFI->isEntryFunction()); + // Debug location must be unknown since the first debug location is used to + // determine the end of the prologue. + DebugLoc DL; + MachineBasicBlock::iterator I = MBB.begin(); + + if (needsFrameMoves(MF)) { + // On entry the SP/FP are not set up, so we need to define the CFA in terms + // of a literal location expression. + static const char CFAEncodedInstUserOpsArr[] = { + dwarf::DW_CFA_def_cfa_expression, + 4, // length + static_cast(dwarf::DW_OP_lit0), + static_cast(dwarf::DW_OP_lit0 + + dwarf::DW_ASPACE_LLVM_AMDGPU_private_wave), + static_cast(dwarf::DW_OP_LLVM_user), + static_cast(dwarf::DW_OP_LLVM_form_aspace_address)}; + static StringRef CFAEncodedInstUserOps = + StringRef(CFAEncodedInstUserOpsArr, sizeof(CFAEncodedInstUserOpsArr)); + buildCFI(MBB, I, DL, + MCCFIInstruction::createEscape(nullptr, CFAEncodedInstUserOps, + SMLoc(), + "CFA is 0 in private_wave aspace")); + // Unwinding halts when the return address (PC) is undefined. + buildCFI(MBB, I, DL, + MCCFIInstruction::createUndefined( + nullptr, MCRI->getDwarfRegNum(AMDGPU::PC_REG, false))); + } + Register PreloadedScratchWaveOffsetReg = MFI->getPreloadedReg( AMDGPUFunctionArgInfo::PRIVATE_SEGMENT_WAVE_BYTE_OFFSET); @@ -655,11 +695,6 @@ void SIFrameLowering::emitEntryFunctionPrologue(MachineFunction &MF, } } - // Debug location must be unknown since the first debug location is used to - // determine the end of the prologue. - DebugLoc DL; - MachineBasicBlock::iterator I = MBB.begin(); - // We found the SRSRC first because it needs four registers and has an // alignment requirement. If the SRSRC that we found is clobbering with // the scratch wave offset, which may be in a fixed SGPR or a free SGPR @@ -2212,3 +2247,15 @@ bool SIFrameLowering::requiresStackPointerReference( // references the SP, like variable sized stack objects. return frameTriviallyRequiresSP(MFI); } + +MachineInstr *SIFrameLowering::buildCFI(MachineBasicBlock &MBB, + MachineBasicBlock::iterator MBBI, + const DebugLoc &DL, + const MCCFIInstruction &CFIInst, + MachineInstr::MIFlag flag) const { + MachineFunction &MF = *MBB.getParent(); + const SIInstrInfo *TII = MF.getSubtarget().getInstrInfo(); + return BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION)) + .addCFIIndex(MF.addFrameInst(CFIInst)) + .setMIFlag(flag); +} diff --git a/llvm/lib/Target/AMDGPU/SIFrameLowering.h b/llvm/lib/Target/AMDGPU/SIFrameLowering.h index a72772987262e..0b691d8f15a48 100644 --- a/llvm/lib/Target/AMDGPU/SIFrameLowering.h +++ b/llvm/lib/Target/AMDGPU/SIFrameLowering.h @@ -104,6 +104,12 @@ class SIFrameLowering final : public AMDGPUFrameLowering { public: bool requiresStackPointerReference(const MachineFunction &MF) const; + /// Create a CFI index for CFIInst and build a MachineInstr around it. + MachineInstr * + buildCFI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, + const DebugLoc &DL, const MCCFIInstruction &CFIInst, + MachineInstr::MIFlag flag = MachineInstr::FrameSetup) const; + // Returns true if the function may need to reserve space on the stack for the // CWSR trap handler. bool mayReserveScratchForCWSR(const MachineFunction &MF) const; diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/memory-legalizer-atomic-fence.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/memory-legalizer-atomic-fence.ll index 37b5422be7e2f..23bab2b53f7f5 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/memory-legalizer-atomic-fence.ll +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/memory-legalizer-atomic-fence.ll @@ -13,18 +13,24 @@ define amdgpu_kernel void @system_one_as_acquire() #0 { ; GFX6-LABEL: name: system_one_as_acquire ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 3952 ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: system_one_as_acquire ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 3952 ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: system_one_as_acquire ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 16240 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -33,6 +39,8 @@ define amdgpu_kernel void @system_one_as_acquire() #0 { ; ; GFX10CU-LABEL: name: system_one_as_acquire ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 16240 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -41,6 +49,8 @@ define amdgpu_kernel void @system_one_as_acquire() #0 { ; ; GFX11WGP-LABEL: name: system_one_as_acquire ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 1015 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -49,6 +59,8 @@ define amdgpu_kernel void @system_one_as_acquire() #0 { ; ; GFX11CU-LABEL: name: system_one_as_acquire ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 1015 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -62,34 +74,46 @@ entry: define amdgpu_kernel void @system_one_as_release() #0 { ; GFX6-LABEL: name: system_one_as_release ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 3952 ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: system_one_as_release ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 3952 ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: system_one_as_release ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 16240 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: system_one_as_release ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 16240 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: system_one_as_release ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 1015 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: system_one_as_release ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 1015 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: S_ENDPGM 0 @@ -101,18 +125,24 @@ entry: define amdgpu_kernel void @system_one_as_acq_rel() #0 { ; GFX6-LABEL: name: system_one_as_acq_rel ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 3952 ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: system_one_as_acq_rel ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 3952 ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: system_one_as_acq_rel ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 16240 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -121,6 +151,8 @@ define amdgpu_kernel void @system_one_as_acq_rel() #0 { ; ; GFX10CU-LABEL: name: system_one_as_acq_rel ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 16240 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -129,6 +161,8 @@ define amdgpu_kernel void @system_one_as_acq_rel() #0 { ; ; GFX11WGP-LABEL: name: system_one_as_acq_rel ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 1015 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -137,6 +171,8 @@ define amdgpu_kernel void @system_one_as_acq_rel() #0 { ; ; GFX11CU-LABEL: name: system_one_as_acq_rel ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 1015 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -150,18 +186,24 @@ entry: define amdgpu_kernel void @system_one_as_seq_cst() #0 { ; GFX6-LABEL: name: system_one_as_seq_cst ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 3952 ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: system_one_as_seq_cst ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 3952 ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: system_one_as_seq_cst ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 16240 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -170,6 +212,8 @@ define amdgpu_kernel void @system_one_as_seq_cst() #0 { ; ; GFX10CU-LABEL: name: system_one_as_seq_cst ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 16240 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -178,6 +222,8 @@ define amdgpu_kernel void @system_one_as_seq_cst() #0 { ; ; GFX11WGP-LABEL: name: system_one_as_seq_cst ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 1015 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -186,6 +232,8 @@ define amdgpu_kernel void @system_one_as_seq_cst() #0 { ; ; GFX11CU-LABEL: name: system_one_as_seq_cst ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 1015 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -199,26 +247,38 @@ entry: define amdgpu_kernel void @singlethread_one_as_acquire() #0 { ; GFX6-LABEL: name: singlethread_one_as_acquire ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: singlethread_one_as_acquire ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: singlethread_one_as_acquire ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: singlethread_one_as_acquire ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: singlethread_one_as_acquire ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: singlethread_one_as_acquire ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("singlethread-one-as") acquire @@ -228,26 +288,38 @@ entry: define amdgpu_kernel void @singlethread_one_as_release() #0 { ; GFX6-LABEL: name: singlethread_one_as_release ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: singlethread_one_as_release ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: singlethread_one_as_release ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: singlethread_one_as_release ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: singlethread_one_as_release ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: singlethread_one_as_release ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("singlethread-one-as") release @@ -257,26 +329,38 @@ entry: define amdgpu_kernel void @singlethread_one_as_acq_rel() #0 { ; GFX6-LABEL: name: singlethread_one_as_acq_rel ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: singlethread_one_as_acq_rel ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: singlethread_one_as_acq_rel ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: singlethread_one_as_acq_rel ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: singlethread_one_as_acq_rel ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: singlethread_one_as_acq_rel ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("singlethread-one-as") acq_rel @@ -286,26 +370,38 @@ entry: define amdgpu_kernel void @singlethread_one_as_seq_cst() #0 { ; GFX6-LABEL: name: singlethread_one_as_seq_cst ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: singlethread_one_as_seq_cst ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: singlethread_one_as_seq_cst ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: singlethread_one_as_seq_cst ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: singlethread_one_as_seq_cst ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: singlethread_one_as_seq_cst ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("singlethread-one-as") seq_cst @@ -315,18 +411,24 @@ entry: define amdgpu_kernel void @agent_one_as_acquire() #0 { ; GFX6-LABEL: name: agent_one_as_acquire ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 3952 ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: agent_one_as_acquire ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 3952 ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: agent_one_as_acquire ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 16240 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -335,6 +437,8 @@ define amdgpu_kernel void @agent_one_as_acquire() #0 { ; ; GFX10CU-LABEL: name: agent_one_as_acquire ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 16240 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -343,6 +447,8 @@ define amdgpu_kernel void @agent_one_as_acquire() #0 { ; ; GFX11WGP-LABEL: name: agent_one_as_acquire ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 1015 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -351,6 +457,8 @@ define amdgpu_kernel void @agent_one_as_acquire() #0 { ; ; GFX11CU-LABEL: name: agent_one_as_acquire ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 1015 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -364,34 +472,46 @@ entry: define amdgpu_kernel void @agent_one_as_release() #0 { ; GFX6-LABEL: name: agent_one_as_release ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 3952 ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: agent_one_as_release ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 3952 ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: agent_one_as_release ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 16240 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: agent_one_as_release ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 16240 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: agent_one_as_release ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 1015 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: agent_one_as_release ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 1015 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: S_ENDPGM 0 @@ -403,18 +523,24 @@ entry: define amdgpu_kernel void @agent_one_as_acq_rel() #0 { ; GFX6-LABEL: name: agent_one_as_acq_rel ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 3952 ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: agent_one_as_acq_rel ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 3952 ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: agent_one_as_acq_rel ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 16240 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -423,6 +549,8 @@ define amdgpu_kernel void @agent_one_as_acq_rel() #0 { ; ; GFX10CU-LABEL: name: agent_one_as_acq_rel ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 16240 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -431,6 +559,8 @@ define amdgpu_kernel void @agent_one_as_acq_rel() #0 { ; ; GFX11WGP-LABEL: name: agent_one_as_acq_rel ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 1015 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -439,6 +569,8 @@ define amdgpu_kernel void @agent_one_as_acq_rel() #0 { ; ; GFX11CU-LABEL: name: agent_one_as_acq_rel ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 1015 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -452,18 +584,24 @@ entry: define amdgpu_kernel void @agent_one_as_seq_cst() #0 { ; GFX6-LABEL: name: agent_one_as_seq_cst ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 3952 ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: agent_one_as_seq_cst ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 3952 ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: agent_one_as_seq_cst ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 16240 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -472,6 +610,8 @@ define amdgpu_kernel void @agent_one_as_seq_cst() #0 { ; ; GFX10CU-LABEL: name: agent_one_as_seq_cst ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 16240 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -480,6 +620,8 @@ define amdgpu_kernel void @agent_one_as_seq_cst() #0 { ; ; GFX11WGP-LABEL: name: agent_one_as_seq_cst ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 1015 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -488,6 +630,8 @@ define amdgpu_kernel void @agent_one_as_seq_cst() #0 { ; ; GFX11CU-LABEL: name: agent_one_as_seq_cst ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 1015 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -501,14 +645,20 @@ entry: define amdgpu_kernel void @workgroup_one_as_acquire() #0 { ; GFX6-LABEL: name: workgroup_one_as_acquire ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: workgroup_one_as_acquire ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: workgroup_one_as_acquire ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 16240 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL0_INV implicit $exec @@ -516,10 +666,14 @@ define amdgpu_kernel void @workgroup_one_as_acquire() #0 { ; ; GFX10CU-LABEL: name: workgroup_one_as_acquire ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: workgroup_one_as_acquire ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 1015 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec @@ -527,6 +681,8 @@ define amdgpu_kernel void @workgroup_one_as_acquire() #0 { ; ; GFX11CU-LABEL: name: workgroup_one_as_acquire ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("workgroup-one-as") acquire @@ -536,14 +692,20 @@ entry: define amdgpu_kernel void @workgroup_one_as_release() #0 { ; GFX6-LABEL: name: workgroup_one_as_release ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: workgroup_one_as_release ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: workgroup_one_as_release ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 16240 ; GFX10WGP-NEXT: S_WAITCNT_lds_direct ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 @@ -551,6 +713,8 @@ define amdgpu_kernel void @workgroup_one_as_release() #0 { ; ; GFX10CU-LABEL: name: workgroup_one_as_release ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 16240 ; GFX10CU-NEXT: S_WAITCNT_lds_direct ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 @@ -558,12 +722,16 @@ define amdgpu_kernel void @workgroup_one_as_release() #0 { ; ; GFX11WGP-LABEL: name: workgroup_one_as_release ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 1015 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: workgroup_one_as_release ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 1015 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: S_ENDPGM 0 @@ -575,14 +743,20 @@ entry: define amdgpu_kernel void @workgroup_one_as_acq_rel() #0 { ; GFX6-LABEL: name: workgroup_one_as_acq_rel ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: workgroup_one_as_acq_rel ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: workgroup_one_as_acq_rel ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 16240 ; GFX10WGP-NEXT: S_WAITCNT_lds_direct ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 @@ -591,6 +765,8 @@ define amdgpu_kernel void @workgroup_one_as_acq_rel() #0 { ; ; GFX10CU-LABEL: name: workgroup_one_as_acq_rel ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 16240 ; GFX10CU-NEXT: S_WAITCNT_lds_direct ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 @@ -598,6 +774,8 @@ define amdgpu_kernel void @workgroup_one_as_acq_rel() #0 { ; ; GFX11WGP-LABEL: name: workgroup_one_as_acq_rel ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 1015 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec @@ -605,6 +783,8 @@ define amdgpu_kernel void @workgroup_one_as_acq_rel() #0 { ; ; GFX11CU-LABEL: name: workgroup_one_as_acq_rel ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 1015 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: S_ENDPGM 0 @@ -616,14 +796,20 @@ entry: define amdgpu_kernel void @workgroup_one_as_seq_cst() #0 { ; GFX6-LABEL: name: workgroup_one_as_seq_cst ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: workgroup_one_as_seq_cst ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: workgroup_one_as_seq_cst ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 16240 ; GFX10WGP-NEXT: S_WAITCNT_lds_direct ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 @@ -632,6 +818,8 @@ define amdgpu_kernel void @workgroup_one_as_seq_cst() #0 { ; ; GFX10CU-LABEL: name: workgroup_one_as_seq_cst ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 16240 ; GFX10CU-NEXT: S_WAITCNT_lds_direct ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 @@ -639,6 +827,8 @@ define amdgpu_kernel void @workgroup_one_as_seq_cst() #0 { ; ; GFX11WGP-LABEL: name: workgroup_one_as_seq_cst ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 1015 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec @@ -646,6 +836,8 @@ define amdgpu_kernel void @workgroup_one_as_seq_cst() #0 { ; ; GFX11CU-LABEL: name: workgroup_one_as_seq_cst ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 1015 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: S_ENDPGM 0 @@ -657,26 +849,38 @@ entry: define amdgpu_kernel void @wavefront_one_as_acquire() #0 { ; GFX6-LABEL: name: wavefront_one_as_acquire ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: wavefront_one_as_acquire ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: wavefront_one_as_acquire ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: wavefront_one_as_acquire ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: wavefront_one_as_acquire ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: wavefront_one_as_acquire ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("wavefront-one-as") acquire @@ -686,26 +890,38 @@ entry: define amdgpu_kernel void @wavefront_one_as_release() #0 { ; GFX6-LABEL: name: wavefront_one_as_release ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: wavefront_one_as_release ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: wavefront_one_as_release ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: wavefront_one_as_release ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: wavefront_one_as_release ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: wavefront_one_as_release ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("wavefront-one-as") release @@ -715,26 +931,38 @@ entry: define amdgpu_kernel void @wavefront_one_as_acq_rel() #0 { ; GFX6-LABEL: name: wavefront_one_as_acq_rel ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: wavefront_one_as_acq_rel ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: wavefront_one_as_acq_rel ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: wavefront_one_as_acq_rel ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: wavefront_one_as_acq_rel ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: wavefront_one_as_acq_rel ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("wavefront-one-as") acq_rel @@ -744,26 +972,38 @@ entry: define amdgpu_kernel void @wavefront_one_as_seq_cst() #0 { ; GFX6-LABEL: name: wavefront_one_as_seq_cst ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: wavefront_one_as_seq_cst ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: wavefront_one_as_seq_cst ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: wavefront_one_as_seq_cst ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: wavefront_one_as_seq_cst ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: wavefront_one_as_seq_cst ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("wavefront-one-as") seq_cst @@ -773,18 +1013,24 @@ entry: define amdgpu_kernel void @system_acquire() #0 { ; GFX6-LABEL: name: system_acquire ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 112 ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: system_acquire ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 112 ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: system_acquire ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 112 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -793,6 +1039,8 @@ define amdgpu_kernel void @system_acquire() #0 { ; ; GFX10CU-LABEL: name: system_acquire ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 112 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -801,6 +1049,8 @@ define amdgpu_kernel void @system_acquire() #0 { ; ; GFX11WGP-LABEL: name: system_acquire ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 7 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -809,6 +1059,8 @@ define amdgpu_kernel void @system_acquire() #0 { ; ; GFX11CU-LABEL: name: system_acquire ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 7 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -822,34 +1074,46 @@ entry: define amdgpu_kernel void @system_release() #0 { ; GFX6-LABEL: name: system_release ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 112 ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: system_release ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 112 ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: system_release ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 112 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: system_release ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 112 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: system_release ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 7 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: system_release ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 7 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: S_ENDPGM 0 @@ -861,18 +1125,24 @@ entry: define amdgpu_kernel void @system_acq_rel() #0 { ; GFX6-LABEL: name: system_acq_rel ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 112 ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: system_acq_rel ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 112 ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: system_acq_rel ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 112 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -881,6 +1151,8 @@ define amdgpu_kernel void @system_acq_rel() #0 { ; ; GFX10CU-LABEL: name: system_acq_rel ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 112 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -889,6 +1161,8 @@ define amdgpu_kernel void @system_acq_rel() #0 { ; ; GFX11WGP-LABEL: name: system_acq_rel ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 7 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -897,6 +1171,8 @@ define amdgpu_kernel void @system_acq_rel() #0 { ; ; GFX11CU-LABEL: name: system_acq_rel ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 7 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -910,18 +1186,24 @@ entry: define amdgpu_kernel void @system_seq_cst() #0 { ; GFX6-LABEL: name: system_seq_cst ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 112 ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: system_seq_cst ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 112 ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: system_seq_cst ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 112 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -930,6 +1212,8 @@ define amdgpu_kernel void @system_seq_cst() #0 { ; ; GFX10CU-LABEL: name: system_seq_cst ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 112 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -938,6 +1222,8 @@ define amdgpu_kernel void @system_seq_cst() #0 { ; ; GFX11WGP-LABEL: name: system_seq_cst ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 7 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -946,6 +1232,8 @@ define amdgpu_kernel void @system_seq_cst() #0 { ; ; GFX11CU-LABEL: name: system_seq_cst ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 7 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -959,26 +1247,38 @@ entry: define amdgpu_kernel void @singlethread_acquire() #0 { ; GFX6-LABEL: name: singlethread_acquire ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: singlethread_acquire ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: singlethread_acquire ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: singlethread_acquire ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: singlethread_acquire ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: singlethread_acquire ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("singlethread") acquire @@ -988,26 +1288,38 @@ entry: define amdgpu_kernel void @singlethread_release() #0 { ; GFX6-LABEL: name: singlethread_release ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: singlethread_release ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: singlethread_release ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: singlethread_release ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: singlethread_release ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: singlethread_release ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("singlethread") release @@ -1017,26 +1329,38 @@ entry: define amdgpu_kernel void @singlethread_acq_rel() #0 { ; GFX6-LABEL: name: singlethread_acq_rel ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: singlethread_acq_rel ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: singlethread_acq_rel ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: singlethread_acq_rel ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: singlethread_acq_rel ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: singlethread_acq_rel ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("singlethread") acq_rel @@ -1046,26 +1370,38 @@ entry: define amdgpu_kernel void @singlethread_seq_cst() #0 { ; GFX6-LABEL: name: singlethread_seq_cst ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: singlethread_seq_cst ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: singlethread_seq_cst ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: singlethread_seq_cst ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: singlethread_seq_cst ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: singlethread_seq_cst ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("singlethread") seq_cst @@ -1075,18 +1411,24 @@ entry: define amdgpu_kernel void @agent_acquire() #0 { ; GFX6-LABEL: name: agent_acquire ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 112 ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: agent_acquire ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 112 ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: agent_acquire ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 112 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -1095,6 +1437,8 @@ define amdgpu_kernel void @agent_acquire() #0 { ; ; GFX10CU-LABEL: name: agent_acquire ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 112 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -1103,6 +1447,8 @@ define amdgpu_kernel void @agent_acquire() #0 { ; ; GFX11WGP-LABEL: name: agent_acquire ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 7 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -1111,6 +1457,8 @@ define amdgpu_kernel void @agent_acquire() #0 { ; ; GFX11CU-LABEL: name: agent_acquire ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 7 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -1124,34 +1472,46 @@ entry: define amdgpu_kernel void @agent_release() #0 { ; GFX6-LABEL: name: agent_release ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 112 ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: agent_release ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 112 ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: agent_release ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 112 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: agent_release ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 112 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: agent_release ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 7 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: agent_release ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 7 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: S_ENDPGM 0 @@ -1163,18 +1523,24 @@ entry: define amdgpu_kernel void @agent_acq_rel() #0 { ; GFX6-LABEL: name: agent_acq_rel ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 112 ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: agent_acq_rel ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 112 ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: agent_acq_rel ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 112 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -1183,6 +1549,8 @@ define amdgpu_kernel void @agent_acq_rel() #0 { ; ; GFX10CU-LABEL: name: agent_acq_rel ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 112 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -1191,6 +1559,8 @@ define amdgpu_kernel void @agent_acq_rel() #0 { ; ; GFX11WGP-LABEL: name: agent_acq_rel ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 7 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -1199,6 +1569,8 @@ define amdgpu_kernel void @agent_acq_rel() #0 { ; ; GFX11CU-LABEL: name: agent_acq_rel ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 7 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -1212,18 +1584,24 @@ entry: define amdgpu_kernel void @agent_seq_cst() #0 { ; GFX6-LABEL: name: agent_seq_cst ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 112 ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: agent_seq_cst ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 112 ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: agent_seq_cst ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 112 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -1232,6 +1610,8 @@ define amdgpu_kernel void @agent_seq_cst() #0 { ; ; GFX10CU-LABEL: name: agent_seq_cst ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 112 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -1240,6 +1620,8 @@ define amdgpu_kernel void @agent_seq_cst() #0 { ; ; GFX11WGP-LABEL: name: agent_seq_cst ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 7 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -1248,6 +1630,8 @@ define amdgpu_kernel void @agent_seq_cst() #0 { ; ; GFX11CU-LABEL: name: agent_seq_cst ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 7 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -1261,16 +1645,22 @@ entry: define amdgpu_kernel void @workgroup_acquire() #0 { ; GFX6-LABEL: name: workgroup_acquire ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 127 ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: workgroup_acquire ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 127 ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: workgroup_acquire ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 112 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL0_INV implicit $exec @@ -1278,11 +1668,15 @@ define amdgpu_kernel void @workgroup_acquire() #0 { ; ; GFX10CU-LABEL: name: workgroup_acquire ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 49279 ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: workgroup_acquire ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 7 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec @@ -1290,6 +1684,8 @@ define amdgpu_kernel void @workgroup_acquire() #0 { ; ; GFX11CU-LABEL: name: workgroup_acquire ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 64519 ; GFX11CU-NEXT: S_ENDPGM 0 entry: @@ -1300,16 +1696,22 @@ entry: define amdgpu_kernel void @workgroup_release() #0 { ; GFX6-LABEL: name: workgroup_release ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 127 ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: workgroup_release ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 127 ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: workgroup_release ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 112 ; GFX10WGP-NEXT: S_WAITCNT_lds_direct ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 @@ -1317,6 +1719,8 @@ define amdgpu_kernel void @workgroup_release() #0 { ; ; GFX10CU-LABEL: name: workgroup_release ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 112 ; GFX10CU-NEXT: S_WAITCNT_lds_direct ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 @@ -1324,12 +1728,16 @@ define amdgpu_kernel void @workgroup_release() #0 { ; ; GFX11WGP-LABEL: name: workgroup_release ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 7 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: workgroup_release ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 7 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: S_ENDPGM 0 @@ -1341,16 +1749,22 @@ entry: define amdgpu_kernel void @workgroup_acq_rel() #0 { ; GFX6-LABEL: name: workgroup_acq_rel ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 127 ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: workgroup_acq_rel ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 127 ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: workgroup_acq_rel ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 112 ; GFX10WGP-NEXT: S_WAITCNT_lds_direct ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 @@ -1359,6 +1773,8 @@ define amdgpu_kernel void @workgroup_acq_rel() #0 { ; ; GFX10CU-LABEL: name: workgroup_acq_rel ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 112 ; GFX10CU-NEXT: S_WAITCNT_lds_direct ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 @@ -1366,6 +1782,8 @@ define amdgpu_kernel void @workgroup_acq_rel() #0 { ; ; GFX11WGP-LABEL: name: workgroup_acq_rel ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 7 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec @@ -1373,6 +1791,8 @@ define amdgpu_kernel void @workgroup_acq_rel() #0 { ; ; GFX11CU-LABEL: name: workgroup_acq_rel ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 7 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: S_ENDPGM 0 @@ -1384,16 +1804,22 @@ entry: define amdgpu_kernel void @workgroup_seq_cst() #0 { ; GFX6-LABEL: name: workgroup_seq_cst ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 127 ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: workgroup_seq_cst ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 127 ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: workgroup_seq_cst ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 112 ; GFX10WGP-NEXT: S_WAITCNT_lds_direct ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 @@ -1402,6 +1828,8 @@ define amdgpu_kernel void @workgroup_seq_cst() #0 { ; ; GFX10CU-LABEL: name: workgroup_seq_cst ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 112 ; GFX10CU-NEXT: S_WAITCNT_lds_direct ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 @@ -1409,6 +1837,8 @@ define amdgpu_kernel void @workgroup_seq_cst() #0 { ; ; GFX11WGP-LABEL: name: workgroup_seq_cst ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 7 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec @@ -1416,6 +1846,8 @@ define amdgpu_kernel void @workgroup_seq_cst() #0 { ; ; GFX11CU-LABEL: name: workgroup_seq_cst ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 7 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: S_ENDPGM 0 @@ -1427,26 +1859,38 @@ entry: define amdgpu_kernel void @wavefront_acquire() #0 { ; GFX6-LABEL: name: wavefront_acquire ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: wavefront_acquire ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: wavefront_acquire ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: wavefront_acquire ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: wavefront_acquire ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: wavefront_acquire ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("wavefront") acquire @@ -1456,26 +1900,38 @@ entry: define amdgpu_kernel void @wavefront_release() #0 { ; GFX6-LABEL: name: wavefront_release ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: wavefront_release ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: wavefront_release ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: wavefront_release ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: wavefront_release ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: wavefront_release ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("wavefront") release @@ -1485,26 +1941,38 @@ entry: define amdgpu_kernel void @wavefront_acq_rel() #0 { ; GFX6-LABEL: name: wavefront_acq_rel ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: wavefront_acq_rel ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: wavefront_acq_rel ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: wavefront_acq_rel ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: wavefront_acq_rel ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: wavefront_acq_rel ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("wavefront") acq_rel @@ -1514,26 +1982,38 @@ entry: define amdgpu_kernel void @wavefront_seq_cst() #0 { ; GFX6-LABEL: name: wavefront_seq_cst ; GFX6: bb.0.entry: + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: wavefront_seq_cst ; GFX8: bb.0.entry: + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: wavefront_seq_cst ; GFX10WGP: bb.0.entry: + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: wavefront_seq_cst ; GFX10CU: bb.0.entry: + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: wavefront_seq_cst ; GFX11WGP: bb.0.entry: + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: wavefront_seq_cst ; GFX11CU: bb.0.entry: + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("wavefront") seq_cst diff --git a/llvm/test/CodeGen/AMDGPU/av-spill-expansion-with-machine-cp.mir b/llvm/test/CodeGen/AMDGPU/av-spill-expansion-with-machine-cp.mir index dfe4b8a33f396..02856a31d2fb7 100644 --- a/llvm/test/CodeGen/AMDGPU/av-spill-expansion-with-machine-cp.mir +++ b/llvm/test/CodeGen/AMDGPU/av-spill-expansion-with-machine-cp.mir @@ -21,6 +21,8 @@ body: | ; GFX908-PEI-LABEL: name: agpr-spill-to-vgpr-machine-cp ; GFX908-PEI: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $vgpr32, $vgpr33 ; GFX908-PEI-NEXT: {{ $}} + ; GFX908-PEI-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX908-PEI-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX908-PEI-NEXT: renamable $agpr0 = COPY renamable $vgpr0, implicit $exec ; GFX908-PEI-NEXT: renamable $agpr2 = COPY renamable $vgpr1, implicit $exec ; GFX908-PEI-NEXT: $vgpr33 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2, implicit $agpr0_agpr1_agpr2 @@ -31,6 +33,8 @@ body: | ; GFX908-PEI-MACHINECP-LABEL: name: agpr-spill-to-vgpr-machine-cp ; GFX908-PEI-MACHINECP: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4, $vgpr5, $vgpr6, $vgpr7, $vgpr8, $vgpr9, $vgpr10, $vgpr11, $vgpr12, $vgpr13, $vgpr14, $vgpr15, $vgpr16, $vgpr17, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $vgpr32, $vgpr33 ; GFX908-PEI-MACHINECP-NEXT: {{ $}} + ; GFX908-PEI-MACHINECP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX908-PEI-MACHINECP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX908-PEI-MACHINECP-NEXT: renamable $agpr0 = COPY renamable $vgpr0, implicit $exec ; GFX908-PEI-MACHINECP-NEXT: renamable $agpr2 = COPY renamable $vgpr1, implicit $exec ; GFX908-PEI-MACHINECP-NEXT: $vgpr33 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2, implicit $agpr0_agpr1_agpr2 @@ -63,6 +67,8 @@ body: | ; GFX908-PEI-LABEL: name: agpr-spill-to-vgpr-to-stack-machine-cp ; GFX908-PEI: liveins: $vgpr0, $vgpr1, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $vgpr32, $vgpr33, $vgpr34, $vgpr35, $vgpr36, $vgpr37, $vgpr38, $vgpr39, $vgpr48, $vgpr49, $vgpr50, $vgpr51, $vgpr52, $vgpr53, $vgpr54, $vgpr55, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX908-PEI-NEXT: {{ $}} + ; GFX908-PEI-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX908-PEI-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX908-PEI-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX908-PEI-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX908-PEI-NEXT: renamable $agpr0 = COPY renamable $vgpr0, implicit $exec @@ -79,6 +85,8 @@ body: | ; GFX908-PEI-MACHINECP-LABEL: name: agpr-spill-to-vgpr-to-stack-machine-cp ; GFX908-PEI-MACHINECP: liveins: $vgpr0, $vgpr1, $vgpr18, $vgpr19, $vgpr20, $vgpr21, $vgpr22, $vgpr23, $vgpr24, $vgpr25, $vgpr26, $vgpr27, $vgpr28, $vgpr29, $vgpr30, $vgpr31, $vgpr32, $vgpr33, $vgpr34, $vgpr35, $vgpr36, $vgpr37, $vgpr38, $vgpr39, $vgpr48, $vgpr49, $vgpr50, $vgpr51, $vgpr52, $vgpr53, $vgpr54, $vgpr55, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX908-PEI-MACHINECP-NEXT: {{ $}} + ; GFX908-PEI-MACHINECP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX908-PEI-MACHINECP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX908-PEI-MACHINECP-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX908-PEI-MACHINECP-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX908-PEI-MACHINECP-NEXT: renamable $agpr0 = COPY renamable $vgpr0, implicit $exec diff --git a/llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll b/llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll index d89b39348ad9a..863177ae3d6b5 100644 --- a/llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll +++ b/llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll @@ -7,6 +7,8 @@ define amdgpu_kernel void @f1(ptr addrspace(1) %arg, ptr addrspace(1) %arg1, i64 ; GFX90A-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000) ; GFX90A-NEXT: liveins: $sgpr14, $sgpr15, $sgpr16, $vgpr0, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr17, $sgpr12_sgpr13 ; GFX90A-NEXT: {{ $}} + ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX90A-NEXT: $sgpr32 = S_MOV_B32 0 ; GFX90A-NEXT: $flat_scr_lo = S_ADD_U32 $sgpr12, $sgpr17, implicit-def $scc ; GFX90A-NEXT: $flat_scr_hi = S_ADDC_U32 $sgpr13, 0, implicit-def dead $scc, implicit $scc diff --git a/llvm/test/CodeGen/AMDGPU/dbg-info-inline-at.ll b/llvm/test/CodeGen/AMDGPU/dbg-info-inline-at.ll index ed609f85918f9..20077fa5d96a7 100644 --- a/llvm/test/CodeGen/AMDGPU/dbg-info-inline-at.ll +++ b/llvm/test/CodeGen/AMDGPU/dbg-info-inline-at.ll @@ -8,6 +8,8 @@ define amdgpu_kernel void @_Z3fooPiiii(ptr addrspace(1) nocapture noundef writeo ; CHECK-NEXT: .cfi_sections .debug_frame ; CHECK-NEXT: .cfi_startproc ; CHECK-NEXT: ; %bb.0: ; %entry +; CHECK-NEXT: .cfi_escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 ; CFA is 0 in private_wave aspace +; CHECK-NEXT: .cfi_undefined 16 ; CHECK-NEXT: .file 1 "." "a.h" ; CHECK-NEXT: .loc 1 5 12 prologue_end ; ./a.h:5:12 @[ a.hip:12:8 ] ; CHECK-NEXT: s_load_dwordx4 s[0:3], s[8:9], 0x8 diff --git a/llvm/test/CodeGen/AMDGPU/debug-frame.ll b/llvm/test/CodeGen/AMDGPU/debug-frame.ll new file mode 100644 index 0000000000000..40ff6ccf0cb0f --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/debug-frame.ll @@ -0,0 +1,1405 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -filetype=asm -o - %s | FileCheck --check-prefixes=CHECK,GFX900 %s +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -amdgpu-spill-vgpr-to-agpr=0 -filetype=asm -o - %s | FileCheck --check-prefixes=CHECK,GFX90A-V2A-DIS %s +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -amdgpu-spill-vgpr-to-agpr=1 -filetype=asm -o - %s | FileCheck --check-prefixes=CHECK,GFX90A-V2A-EN %s +; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -filetype=asm -o - %s | FileCheck --check-prefixes=CHECK,WAVE32 %s + +define protected amdgpu_kernel void @kern1() #0 { +; CHECK-LABEL: kern1: +; CHECK: .Lfunc_begin0: +; CHECK-NEXT: .cfi_sections .debug_frame +; CHECK-NEXT: .cfi_startproc +; CHECK-NEXT: ; %bb.0: ; %entry +; CHECK-NEXT: .cfi_escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 ; CFA is 0 in private_wave aspace +; CHECK-NEXT: .cfi_undefined 16 +; CHECK-NEXT: s_endpgm +entry: + ret void +} + +define hidden void @func_no_clobber() #0 { +; CHECK-LABEL: func_no_clobber: +; CHECK: .Lfunc_begin1: +; CHECK-NEXT: .cfi_startproc +; CHECK-NEXT: ; %bb.0: ; %entry +; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; CHECK-NEXT: s_setpc_b64 s[30:31] +entry: + ret void +} + +define void @callee_need_to_spill_fp_to_memory() #1 { +; GFX900-LABEL: callee_need_to_spill_fp_to_memory: +; GFX900: .Lfunc_begin2: +; GFX900-NEXT: .cfi_startproc +; GFX900-NEXT: ; %bb.0: +; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: s_mov_b32 s40, s33 +; GFX900-NEXT: s_mov_b32 s33, s32 +; GFX900-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:444 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v41, off, s[0:3], s33 offset:440 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:436 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v43, off, s[0:3], s33 offset:432 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v44, off, s[0:3], s33 offset:428 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v45, off, s[0:3], s33 offset:424 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v46, off, s[0:3], s33 offset:420 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v47, off, s[0:3], s33 offset:416 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v56, off, s[0:3], s33 offset:412 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v57, off, s[0:3], s33 offset:408 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v58, off, s[0:3], s33 offset:404 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v59, off, s[0:3], s33 offset:400 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v60, off, s[0:3], s33 offset:396 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v61, off, s[0:3], s33 offset:392 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v62, off, s[0:3], s33 offset:388 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v63, off, s[0:3], s33 offset:384 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v72, off, s[0:3], s33 offset:380 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v73, off, s[0:3], s33 offset:376 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v74, off, s[0:3], s33 offset:372 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v75, off, s[0:3], s33 offset:368 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v76, off, s[0:3], s33 offset:364 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v77, off, s[0:3], s33 offset:360 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v78, off, s[0:3], s33 offset:356 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v79, off, s[0:3], s33 offset:352 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v88, off, s[0:3], s33 offset:348 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v89, off, s[0:3], s33 offset:344 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v90, off, s[0:3], s33 offset:340 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v91, off, s[0:3], s33 offset:336 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v92, off, s[0:3], s33 offset:332 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v93, off, s[0:3], s33 offset:328 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v94, off, s[0:3], s33 offset:324 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v95, off, s[0:3], s33 offset:320 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v104, off, s[0:3], s33 offset:316 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v105, off, s[0:3], s33 offset:312 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v106, off, s[0:3], s33 offset:308 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v107, off, s[0:3], s33 offset:304 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v108, off, s[0:3], s33 offset:300 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v109, off, s[0:3], s33 offset:296 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v110, off, s[0:3], s33 offset:292 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v111, off, s[0:3], s33 offset:288 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v120, off, s[0:3], s33 offset:284 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v121, off, s[0:3], s33 offset:280 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v122, off, s[0:3], s33 offset:276 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v123, off, s[0:3], s33 offset:272 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v124, off, s[0:3], s33 offset:268 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v125, off, s[0:3], s33 offset:264 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v126, off, s[0:3], s33 offset:260 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v127, off, s[0:3], s33 offset:256 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v136, off, s[0:3], s33 offset:252 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v137, off, s[0:3], s33 offset:248 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v138, off, s[0:3], s33 offset:244 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v139, off, s[0:3], s33 offset:240 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v140, off, s[0:3], s33 offset:236 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v141, off, s[0:3], s33 offset:232 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v142, off, s[0:3], s33 offset:228 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v143, off, s[0:3], s33 offset:224 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v152, off, s[0:3], s33 offset:220 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v153, off, s[0:3], s33 offset:216 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v154, off, s[0:3], s33 offset:212 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v155, off, s[0:3], s33 offset:208 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v156, off, s[0:3], s33 offset:204 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v157, off, s[0:3], s33 offset:200 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v158, off, s[0:3], s33 offset:196 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v159, off, s[0:3], s33 offset:192 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v168, off, s[0:3], s33 offset:188 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v169, off, s[0:3], s33 offset:184 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v170, off, s[0:3], s33 offset:180 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v171, off, s[0:3], s33 offset:176 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v172, off, s[0:3], s33 offset:172 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v173, off, s[0:3], s33 offset:168 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v174, off, s[0:3], s33 offset:164 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v175, off, s[0:3], s33 offset:160 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v184, off, s[0:3], s33 offset:156 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v185, off, s[0:3], s33 offset:152 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v186, off, s[0:3], s33 offset:148 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v187, off, s[0:3], s33 offset:144 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v188, off, s[0:3], s33 offset:140 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v189, off, s[0:3], s33 offset:136 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v190, off, s[0:3], s33 offset:132 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v191, off, s[0:3], s33 offset:128 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v200, off, s[0:3], s33 offset:124 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v201, off, s[0:3], s33 offset:120 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v202, off, s[0:3], s33 offset:116 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v203, off, s[0:3], s33 offset:112 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v204, off, s[0:3], s33 offset:108 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v205, off, s[0:3], s33 offset:104 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v206, off, s[0:3], s33 offset:100 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v207, off, s[0:3], s33 offset:96 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v216, off, s[0:3], s33 offset:92 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v217, off, s[0:3], s33 offset:88 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v218, off, s[0:3], s33 offset:84 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v219, off, s[0:3], s33 offset:80 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v220, off, s[0:3], s33 offset:76 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v221, off, s[0:3], s33 offset:72 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v222, off, s[0:3], s33 offset:68 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v223, off, s[0:3], s33 offset:64 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v232, off, s[0:3], s33 offset:60 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v233, off, s[0:3], s33 offset:56 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v234, off, s[0:3], s33 offset:52 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v235, off, s[0:3], s33 offset:48 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v236, off, s[0:3], s33 offset:44 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v237, off, s[0:3], s33 offset:40 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v238, off, s[0:3], s33 offset:36 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v239, off, s[0:3], s33 offset:32 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v248, off, s[0:3], s33 offset:28 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v249, off, s[0:3], s33 offset:24 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v250, off, s[0:3], s33 offset:20 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v251, off, s[0:3], s33 offset:16 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v252, off, s[0:3], s33 offset:12 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v253, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v254, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v255, off, s[0:3], s33 ; 4-byte Folded Spill +; GFX900-NEXT: ;;#ASMSTART +; GFX900-NEXT: ; clobber nonpreserved SGPRs +; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: ;;#ASMSTART +; GFX900-NEXT: ; clobber all VGPRs +; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: buffer_load_dword v255, off, s[0:3], s33 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v254, off, s[0:3], s33 offset:4 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v253, off, s[0:3], s33 offset:8 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v252, off, s[0:3], s33 offset:12 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v251, off, s[0:3], s33 offset:16 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v250, off, s[0:3], s33 offset:20 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v249, off, s[0:3], s33 offset:24 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v248, off, s[0:3], s33 offset:28 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v239, off, s[0:3], s33 offset:32 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v238, off, s[0:3], s33 offset:36 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v237, off, s[0:3], s33 offset:40 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v236, off, s[0:3], s33 offset:44 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v235, off, s[0:3], s33 offset:48 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v234, off, s[0:3], s33 offset:52 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v233, off, s[0:3], s33 offset:56 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v232, off, s[0:3], s33 offset:60 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v223, off, s[0:3], s33 offset:64 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v222, off, s[0:3], s33 offset:68 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v221, off, s[0:3], s33 offset:72 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v220, off, s[0:3], s33 offset:76 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v219, off, s[0:3], s33 offset:80 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v218, off, s[0:3], s33 offset:84 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v217, off, s[0:3], s33 offset:88 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v216, off, s[0:3], s33 offset:92 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v207, off, s[0:3], s33 offset:96 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v206, off, s[0:3], s33 offset:100 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v205, off, s[0:3], s33 offset:104 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v204, off, s[0:3], s33 offset:108 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v203, off, s[0:3], s33 offset:112 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v202, off, s[0:3], s33 offset:116 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v201, off, s[0:3], s33 offset:120 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v200, off, s[0:3], s33 offset:124 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v191, off, s[0:3], s33 offset:128 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v190, off, s[0:3], s33 offset:132 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v189, off, s[0:3], s33 offset:136 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v188, off, s[0:3], s33 offset:140 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v187, off, s[0:3], s33 offset:144 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v186, off, s[0:3], s33 offset:148 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v185, off, s[0:3], s33 offset:152 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v184, off, s[0:3], s33 offset:156 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v175, off, s[0:3], s33 offset:160 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v174, off, s[0:3], s33 offset:164 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v173, off, s[0:3], s33 offset:168 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v172, off, s[0:3], s33 offset:172 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v171, off, s[0:3], s33 offset:176 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v170, off, s[0:3], s33 offset:180 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v169, off, s[0:3], s33 offset:184 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v168, off, s[0:3], s33 offset:188 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v159, off, s[0:3], s33 offset:192 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v158, off, s[0:3], s33 offset:196 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v157, off, s[0:3], s33 offset:200 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v156, off, s[0:3], s33 offset:204 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v155, off, s[0:3], s33 offset:208 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v154, off, s[0:3], s33 offset:212 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v153, off, s[0:3], s33 offset:216 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v152, off, s[0:3], s33 offset:220 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v143, off, s[0:3], s33 offset:224 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v142, off, s[0:3], s33 offset:228 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v141, off, s[0:3], s33 offset:232 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v140, off, s[0:3], s33 offset:236 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v139, off, s[0:3], s33 offset:240 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v138, off, s[0:3], s33 offset:244 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v137, off, s[0:3], s33 offset:248 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v136, off, s[0:3], s33 offset:252 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v127, off, s[0:3], s33 offset:256 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v126, off, s[0:3], s33 offset:260 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v125, off, s[0:3], s33 offset:264 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v124, off, s[0:3], s33 offset:268 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v123, off, s[0:3], s33 offset:272 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v122, off, s[0:3], s33 offset:276 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v121, off, s[0:3], s33 offset:280 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v120, off, s[0:3], s33 offset:284 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v111, off, s[0:3], s33 offset:288 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v110, off, s[0:3], s33 offset:292 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v109, off, s[0:3], s33 offset:296 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v108, off, s[0:3], s33 offset:300 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v107, off, s[0:3], s33 offset:304 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v106, off, s[0:3], s33 offset:308 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v105, off, s[0:3], s33 offset:312 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v104, off, s[0:3], s33 offset:316 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v95, off, s[0:3], s33 offset:320 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v94, off, s[0:3], s33 offset:324 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v93, off, s[0:3], s33 offset:328 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v92, off, s[0:3], s33 offset:332 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v91, off, s[0:3], s33 offset:336 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v90, off, s[0:3], s33 offset:340 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v89, off, s[0:3], s33 offset:344 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v88, off, s[0:3], s33 offset:348 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v79, off, s[0:3], s33 offset:352 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v78, off, s[0:3], s33 offset:356 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v77, off, s[0:3], s33 offset:360 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v76, off, s[0:3], s33 offset:364 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v75, off, s[0:3], s33 offset:368 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v74, off, s[0:3], s33 offset:372 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v73, off, s[0:3], s33 offset:376 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v72, off, s[0:3], s33 offset:380 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v63, off, s[0:3], s33 offset:384 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v62, off, s[0:3], s33 offset:388 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v61, off, s[0:3], s33 offset:392 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v60, off, s[0:3], s33 offset:396 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v59, off, s[0:3], s33 offset:400 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v58, off, s[0:3], s33 offset:404 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v57, off, s[0:3], s33 offset:408 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v56, off, s[0:3], s33 offset:412 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v47, off, s[0:3], s33 offset:416 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v46, off, s[0:3], s33 offset:420 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v45, off, s[0:3], s33 offset:424 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v44, off, s[0:3], s33 offset:428 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v43, off, s[0:3], s33 offset:432 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v42, off, s[0:3], s33 offset:436 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v41, off, s[0:3], s33 offset:440 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v40, off, s[0:3], s33 offset:444 ; 4-byte Folded Reload +; GFX900-NEXT: s_addk_i32 s32, 0x7100 +; GFX900-NEXT: s_mov_b32 s32, s33 +; GFX900-NEXT: s_mov_b32 s33, s40 +; GFX900-NEXT: s_waitcnt vmcnt(0) +; GFX900-NEXT: s_setpc_b64 s[30:31] +; +; GFX90A-V2A-DIS-LABEL: callee_need_to_spill_fp_to_memory: +; GFX90A-V2A-DIS: .Lfunc_begin2: +; GFX90A-V2A-DIS-NEXT: .cfi_startproc +; GFX90A-V2A-DIS-NEXT: ; %bb.0: +; GFX90A-V2A-DIS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX90A-V2A-DIS-NEXT: s_mov_b32 s40, s33 +; GFX90A-V2A-DIS-NEXT: s_mov_b32 s33, s32 +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:444 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v41, off, s[0:3], s33 offset:440 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:436 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v43, off, s[0:3], s33 offset:432 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v44, off, s[0:3], s33 offset:428 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v45, off, s[0:3], s33 offset:424 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v46, off, s[0:3], s33 offset:420 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v47, off, s[0:3], s33 offset:416 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v56, off, s[0:3], s33 offset:412 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v57, off, s[0:3], s33 offset:408 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v58, off, s[0:3], s33 offset:404 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v59, off, s[0:3], s33 offset:400 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v60, off, s[0:3], s33 offset:396 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v61, off, s[0:3], s33 offset:392 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v62, off, s[0:3], s33 offset:388 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v63, off, s[0:3], s33 offset:384 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v72, off, s[0:3], s33 offset:380 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v73, off, s[0:3], s33 offset:376 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v74, off, s[0:3], s33 offset:372 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v75, off, s[0:3], s33 offset:368 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v76, off, s[0:3], s33 offset:364 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v77, off, s[0:3], s33 offset:360 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v78, off, s[0:3], s33 offset:356 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v79, off, s[0:3], s33 offset:352 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v88, off, s[0:3], s33 offset:348 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v89, off, s[0:3], s33 offset:344 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v90, off, s[0:3], s33 offset:340 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v91, off, s[0:3], s33 offset:336 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v92, off, s[0:3], s33 offset:332 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v93, off, s[0:3], s33 offset:328 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v94, off, s[0:3], s33 offset:324 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v95, off, s[0:3], s33 offset:320 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v104, off, s[0:3], s33 offset:316 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v105, off, s[0:3], s33 offset:312 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v106, off, s[0:3], s33 offset:308 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v107, off, s[0:3], s33 offset:304 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v108, off, s[0:3], s33 offset:300 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v109, off, s[0:3], s33 offset:296 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v110, off, s[0:3], s33 offset:292 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v111, off, s[0:3], s33 offset:288 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v120, off, s[0:3], s33 offset:284 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v121, off, s[0:3], s33 offset:280 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v122, off, s[0:3], s33 offset:276 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v123, off, s[0:3], s33 offset:272 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v124, off, s[0:3], s33 offset:268 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v125, off, s[0:3], s33 offset:264 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v126, off, s[0:3], s33 offset:260 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v127, off, s[0:3], s33 offset:256 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v136, off, s[0:3], s33 offset:252 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v137, off, s[0:3], s33 offset:248 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v138, off, s[0:3], s33 offset:244 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v139, off, s[0:3], s33 offset:240 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v140, off, s[0:3], s33 offset:236 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v141, off, s[0:3], s33 offset:232 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v142, off, s[0:3], s33 offset:228 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v143, off, s[0:3], s33 offset:224 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v152, off, s[0:3], s33 offset:220 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v153, off, s[0:3], s33 offset:216 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v154, off, s[0:3], s33 offset:212 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v155, off, s[0:3], s33 offset:208 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v156, off, s[0:3], s33 offset:204 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v157, off, s[0:3], s33 offset:200 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v158, off, s[0:3], s33 offset:196 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v159, off, s[0:3], s33 offset:192 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v168, off, s[0:3], s33 offset:188 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v169, off, s[0:3], s33 offset:184 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v170, off, s[0:3], s33 offset:180 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v171, off, s[0:3], s33 offset:176 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v172, off, s[0:3], s33 offset:172 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v173, off, s[0:3], s33 offset:168 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v174, off, s[0:3], s33 offset:164 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v175, off, s[0:3], s33 offset:160 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v184, off, s[0:3], s33 offset:156 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v185, off, s[0:3], s33 offset:152 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v186, off, s[0:3], s33 offset:148 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v187, off, s[0:3], s33 offset:144 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v188, off, s[0:3], s33 offset:140 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v189, off, s[0:3], s33 offset:136 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v190, off, s[0:3], s33 offset:132 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v191, off, s[0:3], s33 offset:128 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v200, off, s[0:3], s33 offset:124 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v201, off, s[0:3], s33 offset:120 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v202, off, s[0:3], s33 offset:116 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v203, off, s[0:3], s33 offset:112 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v204, off, s[0:3], s33 offset:108 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v205, off, s[0:3], s33 offset:104 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v206, off, s[0:3], s33 offset:100 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v207, off, s[0:3], s33 offset:96 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v216, off, s[0:3], s33 offset:92 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v217, off, s[0:3], s33 offset:88 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v218, off, s[0:3], s33 offset:84 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v219, off, s[0:3], s33 offset:80 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v220, off, s[0:3], s33 offset:76 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v221, off, s[0:3], s33 offset:72 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v222, off, s[0:3], s33 offset:68 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v223, off, s[0:3], s33 offset:64 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v232, off, s[0:3], s33 offset:60 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v233, off, s[0:3], s33 offset:56 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v234, off, s[0:3], s33 offset:52 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v235, off, s[0:3], s33 offset:48 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v236, off, s[0:3], s33 offset:44 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v237, off, s[0:3], s33 offset:40 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v238, off, s[0:3], s33 offset:36 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v239, off, s[0:3], s33 offset:32 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v248, off, s[0:3], s33 offset:28 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v249, off, s[0:3], s33 offset:24 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v250, off, s[0:3], s33 offset:20 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v251, off, s[0:3], s33 offset:16 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v252, off, s[0:3], s33 offset:12 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v253, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v254, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v255, off, s[0:3], s33 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: ;;#ASMSTART +; GFX90A-V2A-DIS-NEXT: ; clobber nonpreserved SGPRs +; GFX90A-V2A-DIS-NEXT: ;;#ASMEND +; GFX90A-V2A-DIS-NEXT: ;;#ASMSTART +; GFX90A-V2A-DIS-NEXT: ; clobber all VGPRs +; GFX90A-V2A-DIS-NEXT: ;;#ASMEND +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v255, off, s[0:3], s33 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v254, off, s[0:3], s33 offset:4 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v253, off, s[0:3], s33 offset:8 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v252, off, s[0:3], s33 offset:12 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v251, off, s[0:3], s33 offset:16 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v250, off, s[0:3], s33 offset:20 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v249, off, s[0:3], s33 offset:24 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v248, off, s[0:3], s33 offset:28 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v239, off, s[0:3], s33 offset:32 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v238, off, s[0:3], s33 offset:36 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v237, off, s[0:3], s33 offset:40 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v236, off, s[0:3], s33 offset:44 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v235, off, s[0:3], s33 offset:48 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v234, off, s[0:3], s33 offset:52 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v233, off, s[0:3], s33 offset:56 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v232, off, s[0:3], s33 offset:60 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v223, off, s[0:3], s33 offset:64 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v222, off, s[0:3], s33 offset:68 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v221, off, s[0:3], s33 offset:72 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v220, off, s[0:3], s33 offset:76 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v219, off, s[0:3], s33 offset:80 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v218, off, s[0:3], s33 offset:84 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v217, off, s[0:3], s33 offset:88 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v216, off, s[0:3], s33 offset:92 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v207, off, s[0:3], s33 offset:96 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v206, off, s[0:3], s33 offset:100 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v205, off, s[0:3], s33 offset:104 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v204, off, s[0:3], s33 offset:108 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v203, off, s[0:3], s33 offset:112 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v202, off, s[0:3], s33 offset:116 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v201, off, s[0:3], s33 offset:120 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v200, off, s[0:3], s33 offset:124 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v191, off, s[0:3], s33 offset:128 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v190, off, s[0:3], s33 offset:132 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v189, off, s[0:3], s33 offset:136 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v188, off, s[0:3], s33 offset:140 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v187, off, s[0:3], s33 offset:144 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v186, off, s[0:3], s33 offset:148 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v185, off, s[0:3], s33 offset:152 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v184, off, s[0:3], s33 offset:156 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v175, off, s[0:3], s33 offset:160 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v174, off, s[0:3], s33 offset:164 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v173, off, s[0:3], s33 offset:168 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v172, off, s[0:3], s33 offset:172 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v171, off, s[0:3], s33 offset:176 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v170, off, s[0:3], s33 offset:180 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v169, off, s[0:3], s33 offset:184 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v168, off, s[0:3], s33 offset:188 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v159, off, s[0:3], s33 offset:192 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v158, off, s[0:3], s33 offset:196 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v157, off, s[0:3], s33 offset:200 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v156, off, s[0:3], s33 offset:204 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v155, off, s[0:3], s33 offset:208 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v154, off, s[0:3], s33 offset:212 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v153, off, s[0:3], s33 offset:216 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v152, off, s[0:3], s33 offset:220 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v143, off, s[0:3], s33 offset:224 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v142, off, s[0:3], s33 offset:228 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v141, off, s[0:3], s33 offset:232 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v140, off, s[0:3], s33 offset:236 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v139, off, s[0:3], s33 offset:240 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v138, off, s[0:3], s33 offset:244 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v137, off, s[0:3], s33 offset:248 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v136, off, s[0:3], s33 offset:252 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v127, off, s[0:3], s33 offset:256 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v126, off, s[0:3], s33 offset:260 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v125, off, s[0:3], s33 offset:264 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v124, off, s[0:3], s33 offset:268 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v123, off, s[0:3], s33 offset:272 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v122, off, s[0:3], s33 offset:276 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v121, off, s[0:3], s33 offset:280 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v120, off, s[0:3], s33 offset:284 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v111, off, s[0:3], s33 offset:288 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v110, off, s[0:3], s33 offset:292 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v109, off, s[0:3], s33 offset:296 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v108, off, s[0:3], s33 offset:300 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v107, off, s[0:3], s33 offset:304 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v106, off, s[0:3], s33 offset:308 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v105, off, s[0:3], s33 offset:312 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v104, off, s[0:3], s33 offset:316 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v95, off, s[0:3], s33 offset:320 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v94, off, s[0:3], s33 offset:324 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v93, off, s[0:3], s33 offset:328 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v92, off, s[0:3], s33 offset:332 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v91, off, s[0:3], s33 offset:336 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v90, off, s[0:3], s33 offset:340 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v89, off, s[0:3], s33 offset:344 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v88, off, s[0:3], s33 offset:348 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v79, off, s[0:3], s33 offset:352 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v78, off, s[0:3], s33 offset:356 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v77, off, s[0:3], s33 offset:360 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v76, off, s[0:3], s33 offset:364 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v75, off, s[0:3], s33 offset:368 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v74, off, s[0:3], s33 offset:372 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v73, off, s[0:3], s33 offset:376 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v72, off, s[0:3], s33 offset:380 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v63, off, s[0:3], s33 offset:384 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v62, off, s[0:3], s33 offset:388 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v61, off, s[0:3], s33 offset:392 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v60, off, s[0:3], s33 offset:396 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v59, off, s[0:3], s33 offset:400 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v58, off, s[0:3], s33 offset:404 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v57, off, s[0:3], s33 offset:408 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v56, off, s[0:3], s33 offset:412 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v47, off, s[0:3], s33 offset:416 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v46, off, s[0:3], s33 offset:420 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v45, off, s[0:3], s33 offset:424 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v44, off, s[0:3], s33 offset:428 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v43, off, s[0:3], s33 offset:432 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v42, off, s[0:3], s33 offset:436 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v41, off, s[0:3], s33 offset:440 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v40, off, s[0:3], s33 offset:444 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: s_addk_i32 s32, 0x7100 +; GFX90A-V2A-DIS-NEXT: s_mov_b32 s32, s33 +; GFX90A-V2A-DIS-NEXT: s_mov_b32 s33, s40 +; GFX90A-V2A-DIS-NEXT: s_waitcnt vmcnt(0) +; GFX90A-V2A-DIS-NEXT: s_setpc_b64 s[30:31] +; +; GFX90A-V2A-EN-LABEL: callee_need_to_spill_fp_to_memory: +; GFX90A-V2A-EN: .Lfunc_begin2: +; GFX90A-V2A-EN-NEXT: .cfi_startproc +; GFX90A-V2A-EN-NEXT: ; %bb.0: +; GFX90A-V2A-EN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX90A-V2A-EN-NEXT: s_mov_b32 s40, s33 +; GFX90A-V2A-EN-NEXT: s_mov_b32 s33, s32 +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a0, v40 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a1, v41 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a2, v42 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a3, v43 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a4, v44 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a5, v45 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a6, v46 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a7, v47 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a8, v56 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a9, v57 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a10, v58 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a11, v59 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a12, v60 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a13, v61 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a14, v62 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a15, v63 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a16, v72 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a17, v73 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a18, v74 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a19, v75 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a20, v76 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a21, v77 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a22, v78 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a23, v79 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a24, v88 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a25, v89 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a26, v90 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a27, v91 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a28, v92 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a29, v93 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a30, v94 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a31, v95 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: buffer_store_dword v104, off, s[0:3], s33 offset:316 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v105, off, s[0:3], s33 offset:312 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v106, off, s[0:3], s33 offset:308 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v107, off, s[0:3], s33 offset:304 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v108, off, s[0:3], s33 offset:300 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v109, off, s[0:3], s33 offset:296 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v110, off, s[0:3], s33 offset:292 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v111, off, s[0:3], s33 offset:288 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v120, off, s[0:3], s33 offset:284 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v121, off, s[0:3], s33 offset:280 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v122, off, s[0:3], s33 offset:276 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v123, off, s[0:3], s33 offset:272 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v124, off, s[0:3], s33 offset:268 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v125, off, s[0:3], s33 offset:264 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v126, off, s[0:3], s33 offset:260 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v127, off, s[0:3], s33 offset:256 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v136, off, s[0:3], s33 offset:252 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v137, off, s[0:3], s33 offset:248 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v138, off, s[0:3], s33 offset:244 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v139, off, s[0:3], s33 offset:240 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v140, off, s[0:3], s33 offset:236 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v141, off, s[0:3], s33 offset:232 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v142, off, s[0:3], s33 offset:228 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v143, off, s[0:3], s33 offset:224 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v152, off, s[0:3], s33 offset:220 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v153, off, s[0:3], s33 offset:216 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v154, off, s[0:3], s33 offset:212 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v155, off, s[0:3], s33 offset:208 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v156, off, s[0:3], s33 offset:204 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v157, off, s[0:3], s33 offset:200 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v158, off, s[0:3], s33 offset:196 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v159, off, s[0:3], s33 offset:192 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v168, off, s[0:3], s33 offset:188 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v169, off, s[0:3], s33 offset:184 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v170, off, s[0:3], s33 offset:180 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v171, off, s[0:3], s33 offset:176 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v172, off, s[0:3], s33 offset:172 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v173, off, s[0:3], s33 offset:168 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v174, off, s[0:3], s33 offset:164 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v175, off, s[0:3], s33 offset:160 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v184, off, s[0:3], s33 offset:156 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v185, off, s[0:3], s33 offset:152 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v186, off, s[0:3], s33 offset:148 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v187, off, s[0:3], s33 offset:144 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v188, off, s[0:3], s33 offset:140 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v189, off, s[0:3], s33 offset:136 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v190, off, s[0:3], s33 offset:132 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v191, off, s[0:3], s33 offset:128 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v200, off, s[0:3], s33 offset:124 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v201, off, s[0:3], s33 offset:120 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v202, off, s[0:3], s33 offset:116 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v203, off, s[0:3], s33 offset:112 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v204, off, s[0:3], s33 offset:108 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v205, off, s[0:3], s33 offset:104 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v206, off, s[0:3], s33 offset:100 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v207, off, s[0:3], s33 offset:96 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v216, off, s[0:3], s33 offset:92 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v217, off, s[0:3], s33 offset:88 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v218, off, s[0:3], s33 offset:84 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v219, off, s[0:3], s33 offset:80 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v220, off, s[0:3], s33 offset:76 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v221, off, s[0:3], s33 offset:72 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v222, off, s[0:3], s33 offset:68 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v223, off, s[0:3], s33 offset:64 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v232, off, s[0:3], s33 offset:60 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v233, off, s[0:3], s33 offset:56 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v234, off, s[0:3], s33 offset:52 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v235, off, s[0:3], s33 offset:48 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v236, off, s[0:3], s33 offset:44 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v237, off, s[0:3], s33 offset:40 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v238, off, s[0:3], s33 offset:36 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v239, off, s[0:3], s33 offset:32 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v248, off, s[0:3], s33 offset:28 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v249, off, s[0:3], s33 offset:24 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v250, off, s[0:3], s33 offset:20 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v251, off, s[0:3], s33 offset:16 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v252, off, s[0:3], s33 offset:12 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v253, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v254, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: buffer_store_dword v255, off, s[0:3], s33 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: ;;#ASMSTART +; GFX90A-V2A-EN-NEXT: ; clobber nonpreserved SGPRs +; GFX90A-V2A-EN-NEXT: ;;#ASMEND +; GFX90A-V2A-EN-NEXT: ;;#ASMSTART +; GFX90A-V2A-EN-NEXT: ; clobber all VGPRs +; GFX90A-V2A-EN-NEXT: ;;#ASMEND +; GFX90A-V2A-EN-NEXT: buffer_load_dword v255, off, s[0:3], s33 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v254, off, s[0:3], s33 offset:4 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v253, off, s[0:3], s33 offset:8 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v252, off, s[0:3], s33 offset:12 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v251, off, s[0:3], s33 offset:16 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v250, off, s[0:3], s33 offset:20 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v249, off, s[0:3], s33 offset:24 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v248, off, s[0:3], s33 offset:28 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v239, off, s[0:3], s33 offset:32 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v238, off, s[0:3], s33 offset:36 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v237, off, s[0:3], s33 offset:40 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v236, off, s[0:3], s33 offset:44 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v235, off, s[0:3], s33 offset:48 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v234, off, s[0:3], s33 offset:52 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v233, off, s[0:3], s33 offset:56 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v232, off, s[0:3], s33 offset:60 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v223, off, s[0:3], s33 offset:64 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v222, off, s[0:3], s33 offset:68 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v221, off, s[0:3], s33 offset:72 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v220, off, s[0:3], s33 offset:76 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v219, off, s[0:3], s33 offset:80 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v218, off, s[0:3], s33 offset:84 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v217, off, s[0:3], s33 offset:88 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v216, off, s[0:3], s33 offset:92 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v207, off, s[0:3], s33 offset:96 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v206, off, s[0:3], s33 offset:100 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v205, off, s[0:3], s33 offset:104 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v204, off, s[0:3], s33 offset:108 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v203, off, s[0:3], s33 offset:112 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v202, off, s[0:3], s33 offset:116 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v201, off, s[0:3], s33 offset:120 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v200, off, s[0:3], s33 offset:124 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v191, off, s[0:3], s33 offset:128 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v190, off, s[0:3], s33 offset:132 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v189, off, s[0:3], s33 offset:136 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v188, off, s[0:3], s33 offset:140 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v187, off, s[0:3], s33 offset:144 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v186, off, s[0:3], s33 offset:148 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v185, off, s[0:3], s33 offset:152 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v184, off, s[0:3], s33 offset:156 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v175, off, s[0:3], s33 offset:160 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v174, off, s[0:3], s33 offset:164 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v173, off, s[0:3], s33 offset:168 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v172, off, s[0:3], s33 offset:172 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v171, off, s[0:3], s33 offset:176 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v170, off, s[0:3], s33 offset:180 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v169, off, s[0:3], s33 offset:184 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v168, off, s[0:3], s33 offset:188 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v159, off, s[0:3], s33 offset:192 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v158, off, s[0:3], s33 offset:196 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v157, off, s[0:3], s33 offset:200 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v156, off, s[0:3], s33 offset:204 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v155, off, s[0:3], s33 offset:208 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v154, off, s[0:3], s33 offset:212 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v153, off, s[0:3], s33 offset:216 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v152, off, s[0:3], s33 offset:220 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v143, off, s[0:3], s33 offset:224 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v142, off, s[0:3], s33 offset:228 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v141, off, s[0:3], s33 offset:232 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v140, off, s[0:3], s33 offset:236 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v139, off, s[0:3], s33 offset:240 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v138, off, s[0:3], s33 offset:244 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v137, off, s[0:3], s33 offset:248 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v136, off, s[0:3], s33 offset:252 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v127, off, s[0:3], s33 offset:256 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v126, off, s[0:3], s33 offset:260 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v125, off, s[0:3], s33 offset:264 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v124, off, s[0:3], s33 offset:268 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v123, off, s[0:3], s33 offset:272 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v122, off, s[0:3], s33 offset:276 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v121, off, s[0:3], s33 offset:280 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v120, off, s[0:3], s33 offset:284 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v111, off, s[0:3], s33 offset:288 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v110, off, s[0:3], s33 offset:292 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v109, off, s[0:3], s33 offset:296 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v108, off, s[0:3], s33 offset:300 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v107, off, s[0:3], s33 offset:304 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v106, off, s[0:3], s33 offset:308 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v105, off, s[0:3], s33 offset:312 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: buffer_load_dword v104, off, s[0:3], s33 offset:316 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: s_addk_i32 s32, 0x5100 +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v95, a31 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v94, a30 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v93, a29 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v92, a28 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v91, a27 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v90, a26 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v89, a25 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v88, a24 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v79, a23 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v78, a22 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v77, a21 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v76, a20 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v75, a19 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v74, a18 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v73, a17 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v72, a16 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v63, a15 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v62, a14 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v61, a13 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v60, a12 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v59, a11 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v58, a10 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v57, a9 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v56, a8 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v47, a7 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v46, a6 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v45, a5 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v44, a4 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v43, a3 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v42, a2 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v41, a1 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v40, a0 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: s_mov_b32 s32, s33 +; GFX90A-V2A-EN-NEXT: s_mov_b32 s33, s40 +; GFX90A-V2A-EN-NEXT: s_waitcnt vmcnt(0) +; GFX90A-V2A-EN-NEXT: s_setpc_b64 s[30:31] +; +; WAVE32-LABEL: callee_need_to_spill_fp_to_memory: +; WAVE32: .Lfunc_begin2: +; WAVE32-NEXT: .cfi_startproc +; WAVE32-NEXT: ; %bb.0: +; WAVE32-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; WAVE32-NEXT: s_mov_b32 s40, s33 +; WAVE32-NEXT: s_mov_b32 s33, s32 +; WAVE32-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:444 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v41, off, s[0:3], s33 offset:440 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v42, off, s[0:3], s33 offset:436 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v43, off, s[0:3], s33 offset:432 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v44, off, s[0:3], s33 offset:428 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v45, off, s[0:3], s33 offset:424 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v46, off, s[0:3], s33 offset:420 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v47, off, s[0:3], s33 offset:416 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v56, off, s[0:3], s33 offset:412 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v57, off, s[0:3], s33 offset:408 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v58, off, s[0:3], s33 offset:404 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v59, off, s[0:3], s33 offset:400 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v60, off, s[0:3], s33 offset:396 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v61, off, s[0:3], s33 offset:392 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v62, off, s[0:3], s33 offset:388 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v63, off, s[0:3], s33 offset:384 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v72, off, s[0:3], s33 offset:380 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v73, off, s[0:3], s33 offset:376 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v74, off, s[0:3], s33 offset:372 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v75, off, s[0:3], s33 offset:368 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v76, off, s[0:3], s33 offset:364 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v77, off, s[0:3], s33 offset:360 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v78, off, s[0:3], s33 offset:356 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v79, off, s[0:3], s33 offset:352 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v88, off, s[0:3], s33 offset:348 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v89, off, s[0:3], s33 offset:344 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v90, off, s[0:3], s33 offset:340 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v91, off, s[0:3], s33 offset:336 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v92, off, s[0:3], s33 offset:332 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v93, off, s[0:3], s33 offset:328 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v94, off, s[0:3], s33 offset:324 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v95, off, s[0:3], s33 offset:320 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v104, off, s[0:3], s33 offset:316 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v105, off, s[0:3], s33 offset:312 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v106, off, s[0:3], s33 offset:308 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v107, off, s[0:3], s33 offset:304 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v108, off, s[0:3], s33 offset:300 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v109, off, s[0:3], s33 offset:296 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v110, off, s[0:3], s33 offset:292 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v111, off, s[0:3], s33 offset:288 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v120, off, s[0:3], s33 offset:284 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v121, off, s[0:3], s33 offset:280 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v122, off, s[0:3], s33 offset:276 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v123, off, s[0:3], s33 offset:272 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v124, off, s[0:3], s33 offset:268 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v125, off, s[0:3], s33 offset:264 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v126, off, s[0:3], s33 offset:260 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v127, off, s[0:3], s33 offset:256 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v136, off, s[0:3], s33 offset:252 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v137, off, s[0:3], s33 offset:248 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v138, off, s[0:3], s33 offset:244 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v139, off, s[0:3], s33 offset:240 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v140, off, s[0:3], s33 offset:236 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v141, off, s[0:3], s33 offset:232 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v142, off, s[0:3], s33 offset:228 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v143, off, s[0:3], s33 offset:224 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v152, off, s[0:3], s33 offset:220 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v153, off, s[0:3], s33 offset:216 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v154, off, s[0:3], s33 offset:212 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v155, off, s[0:3], s33 offset:208 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v156, off, s[0:3], s33 offset:204 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v157, off, s[0:3], s33 offset:200 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v158, off, s[0:3], s33 offset:196 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v159, off, s[0:3], s33 offset:192 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v168, off, s[0:3], s33 offset:188 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v169, off, s[0:3], s33 offset:184 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v170, off, s[0:3], s33 offset:180 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v171, off, s[0:3], s33 offset:176 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v172, off, s[0:3], s33 offset:172 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v173, off, s[0:3], s33 offset:168 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v174, off, s[0:3], s33 offset:164 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v175, off, s[0:3], s33 offset:160 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v184, off, s[0:3], s33 offset:156 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v185, off, s[0:3], s33 offset:152 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v186, off, s[0:3], s33 offset:148 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v187, off, s[0:3], s33 offset:144 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v188, off, s[0:3], s33 offset:140 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v189, off, s[0:3], s33 offset:136 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v190, off, s[0:3], s33 offset:132 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v191, off, s[0:3], s33 offset:128 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v200, off, s[0:3], s33 offset:124 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v201, off, s[0:3], s33 offset:120 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v202, off, s[0:3], s33 offset:116 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v203, off, s[0:3], s33 offset:112 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v204, off, s[0:3], s33 offset:108 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v205, off, s[0:3], s33 offset:104 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v206, off, s[0:3], s33 offset:100 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v207, off, s[0:3], s33 offset:96 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v216, off, s[0:3], s33 offset:92 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v217, off, s[0:3], s33 offset:88 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v218, off, s[0:3], s33 offset:84 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v219, off, s[0:3], s33 offset:80 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v220, off, s[0:3], s33 offset:76 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v221, off, s[0:3], s33 offset:72 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v222, off, s[0:3], s33 offset:68 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v223, off, s[0:3], s33 offset:64 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v232, off, s[0:3], s33 offset:60 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v233, off, s[0:3], s33 offset:56 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v234, off, s[0:3], s33 offset:52 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v235, off, s[0:3], s33 offset:48 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v236, off, s[0:3], s33 offset:44 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v237, off, s[0:3], s33 offset:40 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v238, off, s[0:3], s33 offset:36 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v239, off, s[0:3], s33 offset:32 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v248, off, s[0:3], s33 offset:28 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v249, off, s[0:3], s33 offset:24 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v250, off, s[0:3], s33 offset:20 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v251, off, s[0:3], s33 offset:16 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v252, off, s[0:3], s33 offset:12 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v253, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v254, off, s[0:3], s33 offset:4 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v255, off, s[0:3], s33 ; 4-byte Folded Spill +; WAVE32-NEXT: ;;#ASMSTART +; WAVE32-NEXT: ; clobber nonpreserved SGPRs +; WAVE32-NEXT: ;;#ASMEND +; WAVE32-NEXT: ;;#ASMSTART +; WAVE32-NEXT: ; clobber all VGPRs +; WAVE32-NEXT: ;;#ASMEND +; WAVE32-NEXT: s_clause 0x3e +; WAVE32-NEXT: buffer_load_dword v255, off, s[0:3], s33 +; WAVE32-NEXT: buffer_load_dword v254, off, s[0:3], s33 offset:4 +; WAVE32-NEXT: buffer_load_dword v253, off, s[0:3], s33 offset:8 +; WAVE32-NEXT: buffer_load_dword v252, off, s[0:3], s33 offset:12 +; WAVE32-NEXT: buffer_load_dword v251, off, s[0:3], s33 offset:16 +; WAVE32-NEXT: buffer_load_dword v250, off, s[0:3], s33 offset:20 +; WAVE32-NEXT: buffer_load_dword v249, off, s[0:3], s33 offset:24 +; WAVE32-NEXT: buffer_load_dword v248, off, s[0:3], s33 offset:28 +; WAVE32-NEXT: buffer_load_dword v239, off, s[0:3], s33 offset:32 +; WAVE32-NEXT: buffer_load_dword v238, off, s[0:3], s33 offset:36 +; WAVE32-NEXT: buffer_load_dword v237, off, s[0:3], s33 offset:40 +; WAVE32-NEXT: buffer_load_dword v236, off, s[0:3], s33 offset:44 +; WAVE32-NEXT: buffer_load_dword v235, off, s[0:3], s33 offset:48 +; WAVE32-NEXT: buffer_load_dword v234, off, s[0:3], s33 offset:52 +; WAVE32-NEXT: buffer_load_dword v233, off, s[0:3], s33 offset:56 +; WAVE32-NEXT: buffer_load_dword v232, off, s[0:3], s33 offset:60 +; WAVE32-NEXT: buffer_load_dword v223, off, s[0:3], s33 offset:64 +; WAVE32-NEXT: buffer_load_dword v222, off, s[0:3], s33 offset:68 +; WAVE32-NEXT: buffer_load_dword v221, off, s[0:3], s33 offset:72 +; WAVE32-NEXT: buffer_load_dword v220, off, s[0:3], s33 offset:76 +; WAVE32-NEXT: buffer_load_dword v219, off, s[0:3], s33 offset:80 +; WAVE32-NEXT: buffer_load_dword v218, off, s[0:3], s33 offset:84 +; WAVE32-NEXT: buffer_load_dword v217, off, s[0:3], s33 offset:88 +; WAVE32-NEXT: buffer_load_dword v216, off, s[0:3], s33 offset:92 +; WAVE32-NEXT: buffer_load_dword v207, off, s[0:3], s33 offset:96 +; WAVE32-NEXT: buffer_load_dword v206, off, s[0:3], s33 offset:100 +; WAVE32-NEXT: buffer_load_dword v205, off, s[0:3], s33 offset:104 +; WAVE32-NEXT: buffer_load_dword v204, off, s[0:3], s33 offset:108 +; WAVE32-NEXT: buffer_load_dword v203, off, s[0:3], s33 offset:112 +; WAVE32-NEXT: buffer_load_dword v202, off, s[0:3], s33 offset:116 +; WAVE32-NEXT: buffer_load_dword v201, off, s[0:3], s33 offset:120 +; WAVE32-NEXT: buffer_load_dword v200, off, s[0:3], s33 offset:124 +; WAVE32-NEXT: buffer_load_dword v191, off, s[0:3], s33 offset:128 +; WAVE32-NEXT: buffer_load_dword v190, off, s[0:3], s33 offset:132 +; WAVE32-NEXT: buffer_load_dword v189, off, s[0:3], s33 offset:136 +; WAVE32-NEXT: buffer_load_dword v188, off, s[0:3], s33 offset:140 +; WAVE32-NEXT: buffer_load_dword v187, off, s[0:3], s33 offset:144 +; WAVE32-NEXT: buffer_load_dword v186, off, s[0:3], s33 offset:148 +; WAVE32-NEXT: buffer_load_dword v185, off, s[0:3], s33 offset:152 +; WAVE32-NEXT: buffer_load_dword v184, off, s[0:3], s33 offset:156 +; WAVE32-NEXT: buffer_load_dword v175, off, s[0:3], s33 offset:160 +; WAVE32-NEXT: buffer_load_dword v174, off, s[0:3], s33 offset:164 +; WAVE32-NEXT: buffer_load_dword v173, off, s[0:3], s33 offset:168 +; WAVE32-NEXT: buffer_load_dword v172, off, s[0:3], s33 offset:172 +; WAVE32-NEXT: buffer_load_dword v171, off, s[0:3], s33 offset:176 +; WAVE32-NEXT: buffer_load_dword v170, off, s[0:3], s33 offset:180 +; WAVE32-NEXT: buffer_load_dword v169, off, s[0:3], s33 offset:184 +; WAVE32-NEXT: buffer_load_dword v168, off, s[0:3], s33 offset:188 +; WAVE32-NEXT: buffer_load_dword v159, off, s[0:3], s33 offset:192 +; WAVE32-NEXT: buffer_load_dword v158, off, s[0:3], s33 offset:196 +; WAVE32-NEXT: buffer_load_dword v157, off, s[0:3], s33 offset:200 +; WAVE32-NEXT: buffer_load_dword v156, off, s[0:3], s33 offset:204 +; WAVE32-NEXT: buffer_load_dword v155, off, s[0:3], s33 offset:208 +; WAVE32-NEXT: buffer_load_dword v154, off, s[0:3], s33 offset:212 +; WAVE32-NEXT: buffer_load_dword v153, off, s[0:3], s33 offset:216 +; WAVE32-NEXT: buffer_load_dword v152, off, s[0:3], s33 offset:220 +; WAVE32-NEXT: buffer_load_dword v143, off, s[0:3], s33 offset:224 +; WAVE32-NEXT: buffer_load_dword v142, off, s[0:3], s33 offset:228 +; WAVE32-NEXT: buffer_load_dword v141, off, s[0:3], s33 offset:232 +; WAVE32-NEXT: buffer_load_dword v140, off, s[0:3], s33 offset:236 +; WAVE32-NEXT: buffer_load_dword v139, off, s[0:3], s33 offset:240 +; WAVE32-NEXT: buffer_load_dword v138, off, s[0:3], s33 offset:244 +; WAVE32-NEXT: buffer_load_dword v137, off, s[0:3], s33 offset:248 +; WAVE32-NEXT: s_clause 0x30 +; WAVE32-NEXT: buffer_load_dword v136, off, s[0:3], s33 offset:252 +; WAVE32-NEXT: buffer_load_dword v127, off, s[0:3], s33 offset:256 +; WAVE32-NEXT: buffer_load_dword v126, off, s[0:3], s33 offset:260 +; WAVE32-NEXT: buffer_load_dword v125, off, s[0:3], s33 offset:264 +; WAVE32-NEXT: buffer_load_dword v124, off, s[0:3], s33 offset:268 +; WAVE32-NEXT: buffer_load_dword v123, off, s[0:3], s33 offset:272 +; WAVE32-NEXT: buffer_load_dword v122, off, s[0:3], s33 offset:276 +; WAVE32-NEXT: buffer_load_dword v121, off, s[0:3], s33 offset:280 +; WAVE32-NEXT: buffer_load_dword v120, off, s[0:3], s33 offset:284 +; WAVE32-NEXT: buffer_load_dword v111, off, s[0:3], s33 offset:288 +; WAVE32-NEXT: buffer_load_dword v110, off, s[0:3], s33 offset:292 +; WAVE32-NEXT: buffer_load_dword v109, off, s[0:3], s33 offset:296 +; WAVE32-NEXT: buffer_load_dword v108, off, s[0:3], s33 offset:300 +; WAVE32-NEXT: buffer_load_dword v107, off, s[0:3], s33 offset:304 +; WAVE32-NEXT: buffer_load_dword v106, off, s[0:3], s33 offset:308 +; WAVE32-NEXT: buffer_load_dword v105, off, s[0:3], s33 offset:312 +; WAVE32-NEXT: buffer_load_dword v104, off, s[0:3], s33 offset:316 +; WAVE32-NEXT: buffer_load_dword v95, off, s[0:3], s33 offset:320 +; WAVE32-NEXT: buffer_load_dword v94, off, s[0:3], s33 offset:324 +; WAVE32-NEXT: buffer_load_dword v93, off, s[0:3], s33 offset:328 +; WAVE32-NEXT: buffer_load_dword v92, off, s[0:3], s33 offset:332 +; WAVE32-NEXT: buffer_load_dword v91, off, s[0:3], s33 offset:336 +; WAVE32-NEXT: buffer_load_dword v90, off, s[0:3], s33 offset:340 +; WAVE32-NEXT: buffer_load_dword v89, off, s[0:3], s33 offset:344 +; WAVE32-NEXT: buffer_load_dword v88, off, s[0:3], s33 offset:348 +; WAVE32-NEXT: buffer_load_dword v79, off, s[0:3], s33 offset:352 +; WAVE32-NEXT: buffer_load_dword v78, off, s[0:3], s33 offset:356 +; WAVE32-NEXT: buffer_load_dword v77, off, s[0:3], s33 offset:360 +; WAVE32-NEXT: buffer_load_dword v76, off, s[0:3], s33 offset:364 +; WAVE32-NEXT: buffer_load_dword v75, off, s[0:3], s33 offset:368 +; WAVE32-NEXT: buffer_load_dword v74, off, s[0:3], s33 offset:372 +; WAVE32-NEXT: buffer_load_dword v73, off, s[0:3], s33 offset:376 +; WAVE32-NEXT: buffer_load_dword v72, off, s[0:3], s33 offset:380 +; WAVE32-NEXT: buffer_load_dword v63, off, s[0:3], s33 offset:384 +; WAVE32-NEXT: buffer_load_dword v62, off, s[0:3], s33 offset:388 +; WAVE32-NEXT: buffer_load_dword v61, off, s[0:3], s33 offset:392 +; WAVE32-NEXT: buffer_load_dword v60, off, s[0:3], s33 offset:396 +; WAVE32-NEXT: buffer_load_dword v59, off, s[0:3], s33 offset:400 +; WAVE32-NEXT: buffer_load_dword v58, off, s[0:3], s33 offset:404 +; WAVE32-NEXT: buffer_load_dword v57, off, s[0:3], s33 offset:408 +; WAVE32-NEXT: buffer_load_dword v56, off, s[0:3], s33 offset:412 +; WAVE32-NEXT: buffer_load_dword v47, off, s[0:3], s33 offset:416 +; WAVE32-NEXT: buffer_load_dword v46, off, s[0:3], s33 offset:420 +; WAVE32-NEXT: buffer_load_dword v45, off, s[0:3], s33 offset:424 +; WAVE32-NEXT: buffer_load_dword v44, off, s[0:3], s33 offset:428 +; WAVE32-NEXT: buffer_load_dword v43, off, s[0:3], s33 offset:432 +; WAVE32-NEXT: buffer_load_dword v42, off, s[0:3], s33 offset:436 +; WAVE32-NEXT: buffer_load_dword v41, off, s[0:3], s33 offset:440 +; WAVE32-NEXT: buffer_load_dword v40, off, s[0:3], s33 offset:444 +; WAVE32-NEXT: s_addk_i32 s32, 0x3880 +; WAVE32-NEXT: s_mov_b32 s32, s33 +; WAVE32-NEXT: s_waitcnt_depctr 0xffe3 +; WAVE32-NEXT: s_mov_b32 s33, s40 +; WAVE32-NEXT: s_waitcnt vmcnt(0) +; WAVE32-NEXT: s_setpc_b64 s[30:31] + call void asm sideeffect "; clobber nonpreserved SGPRs", + "~{s4},~{s5},~{s6},~{s7},~{s8},~{s9} + ,~{s10},~{s11},~{s12},~{s13},~{s14},~{s15},~{s16},~{s17},~{s18},~{s19} + ,~{s20},~{s21},~{s22},~{s23},~{s24},~{s25},~{s26},~{s27},~{s28},~{s29} + ,~{vcc}"() + + call void asm sideeffect "; clobber all VGPRs", + "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9} + ,~{v10},~{v11},~{v12},~{v13},~{v14},~{v15},~{v16},~{v17},~{v18},~{v19} + ,~{v20},~{v21},~{v22},~{v23},~{v24},~{v25},~{v26},~{v27},~{v28},~{v29} + ,~{v30},~{v31},~{v32},~{v33},~{v34},~{v35},~{v36},~{v37},~{v38},~{v39} + ,~{v40},~{v41},~{v42},~{v43},~{v44},~{v45},~{v46},~{v47},~{v48},~{v49} + ,~{v50},~{v51},~{v52},~{v53},~{v54},~{v55},~{v56},~{v57},~{v58},~{v59} + ,~{v60},~{v61},~{v62},~{v63},~{v64},~{v65},~{v66},~{v67},~{v68},~{v69} + ,~{v70},~{v71},~{v72},~{v73},~{v74},~{v75},~{v76},~{v77},~{v78},~{v79} + ,~{v80},~{v81},~{v82},~{v83},~{v84},~{v85},~{v86},~{v87},~{v88},~{v89} + ,~{v90},~{v91},~{v92},~{v93},~{v94},~{v95},~{v96},~{v97},~{v98},~{v99} + ,~{v100},~{v101},~{v102},~{v103},~{v104},~{v105},~{v106},~{v107},~{v108},~{v109} + ,~{v110},~{v111},~{v112},~{v113},~{v114},~{v115},~{v116},~{v117},~{v118},~{v119} + ,~{v120},~{v121},~{v122},~{v123},~{v124},~{v125},~{v126},~{v127},~{v128},~{v129} + ,~{v130},~{v131},~{v132},~{v133},~{v134},~{v135},~{v136},~{v137},~{v138},~{v139} + ,~{v140},~{v141},~{v142},~{v143},~{v144},~{v145},~{v146},~{v147},~{v148},~{v149} + ,~{v150},~{v151},~{v152},~{v153},~{v154},~{v155},~{v156},~{v157},~{v158},~{v159} + ,~{v160},~{v161},~{v162},~{v163},~{v164},~{v165},~{v166},~{v167},~{v168},~{v169} + ,~{v170},~{v171},~{v172},~{v173},~{v174},~{v175},~{v176},~{v177},~{v178},~{v179} + ,~{v180},~{v181},~{v182},~{v183},~{v184},~{v185},~{v186},~{v187},~{v188},~{v189} + ,~{v190},~{v191},~{v192},~{v193},~{v194},~{v195},~{v196},~{v197},~{v198},~{v199} + ,~{v200},~{v201},~{v202},~{v203},~{v204},~{v205},~{v206},~{v207},~{v208},~{v209} + ,~{v210},~{v211},~{v212},~{v213},~{v214},~{v215},~{v216},~{v217},~{v218},~{v219} + ,~{v220},~{v221},~{v222},~{v223},~{v224},~{v225},~{v226},~{v227},~{v228},~{v229} + ,~{v230},~{v231},~{v232},~{v233},~{v234},~{v235},~{v236},~{v237},~{v238},~{v239} + ,~{v240},~{v241},~{v242},~{v243},~{v244},~{v245},~{v246},~{v247},~{v248},~{v249} + ,~{v250},~{v251},~{v252},~{v253},~{v254},~{v255}"() + ret void +} + +declare hidden void @ex() #0 + +define hidden void @func_call_clobber() #0 { +; GFX900-LABEL: func_call_clobber: +; GFX900: .Lfunc_begin3: +; GFX900-NEXT: .cfi_startproc +; GFX900-NEXT: ; %bb.0: ; %entry +; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: s_mov_b32 s16, s33 +; GFX900-NEXT: s_mov_b32 s33, s32 +; GFX900-NEXT: s_or_saveexec_b64 s[18:19], -1 +; GFX900-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill +; GFX900-NEXT: s_mov_b64 exec, s[18:19] +; GFX900-NEXT: v_writelane_b32 v40, s16, 2 +; GFX900-NEXT: s_addk_i32 s32, 0x400 +; GFX900-NEXT: v_writelane_b32 v40, s30, 0 +; GFX900-NEXT: s_getpc_b64 s[16:17] +; GFX900-NEXT: s_add_u32 s16, s16, ex@rel32@lo+4 +; GFX900-NEXT: s_addc_u32 s17, s17, ex@rel32@hi+12 +; GFX900-NEXT: v_writelane_b32 v40, s31, 1 +; GFX900-NEXT: s_swappc_b64 s[30:31], s[16:17] +; GFX900-NEXT: v_readlane_b32 s31, v40, 1 +; GFX900-NEXT: v_readlane_b32 s30, v40, 0 +; GFX900-NEXT: s_mov_b32 s32, s33 +; GFX900-NEXT: v_readlane_b32 s4, v40, 2 +; GFX900-NEXT: s_or_saveexec_b64 s[6:7], -1 +; GFX900-NEXT: buffer_load_dword v40, off, s[0:3], s33 ; 4-byte Folded Reload +; GFX900-NEXT: s_mov_b64 exec, s[6:7] +; GFX900-NEXT: s_mov_b32 s33, s4 +; GFX900-NEXT: s_waitcnt vmcnt(0) +; GFX900-NEXT: s_setpc_b64 s[30:31] +; +; GFX90A-V2A-DIS-LABEL: func_call_clobber: +; GFX90A-V2A-DIS: .Lfunc_begin3: +; GFX90A-V2A-DIS-NEXT: .cfi_startproc +; GFX90A-V2A-DIS-NEXT: ; %bb.0: ; %entry +; GFX90A-V2A-DIS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX90A-V2A-DIS-NEXT: s_mov_b32 s16, s33 +; GFX90A-V2A-DIS-NEXT: s_mov_b32 s33, s32 +; GFX90A-V2A-DIS-NEXT: s_or_saveexec_b64 s[18:19], -1 +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: s_mov_b64 exec, s[18:19] +; GFX90A-V2A-DIS-NEXT: v_writelane_b32 v40, s16, 2 +; GFX90A-V2A-DIS-NEXT: s_addk_i32 s32, 0x400 +; GFX90A-V2A-DIS-NEXT: v_writelane_b32 v40, s30, 0 +; GFX90A-V2A-DIS-NEXT: s_getpc_b64 s[16:17] +; GFX90A-V2A-DIS-NEXT: s_add_u32 s16, s16, ex@rel32@lo+4 +; GFX90A-V2A-DIS-NEXT: s_addc_u32 s17, s17, ex@rel32@hi+12 +; GFX90A-V2A-DIS-NEXT: v_writelane_b32 v40, s31, 1 +; GFX90A-V2A-DIS-NEXT: s_swappc_b64 s[30:31], s[16:17] +; GFX90A-V2A-DIS-NEXT: v_readlane_b32 s31, v40, 1 +; GFX90A-V2A-DIS-NEXT: v_readlane_b32 s30, v40, 0 +; GFX90A-V2A-DIS-NEXT: s_mov_b32 s32, s33 +; GFX90A-V2A-DIS-NEXT: v_readlane_b32 s4, v40, 2 +; GFX90A-V2A-DIS-NEXT: s_or_saveexec_b64 s[6:7], -1 +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v40, off, s[0:3], s33 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: s_mov_b64 exec, s[6:7] +; GFX90A-V2A-DIS-NEXT: s_mov_b32 s33, s4 +; GFX90A-V2A-DIS-NEXT: s_waitcnt vmcnt(0) +; GFX90A-V2A-DIS-NEXT: s_setpc_b64 s[30:31] +; +; GFX90A-V2A-EN-LABEL: func_call_clobber: +; GFX90A-V2A-EN: .Lfunc_begin3: +; GFX90A-V2A-EN-NEXT: .cfi_startproc +; GFX90A-V2A-EN-NEXT: ; %bb.0: ; %entry +; GFX90A-V2A-EN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX90A-V2A-EN-NEXT: s_mov_b32 s16, s33 +; GFX90A-V2A-EN-NEXT: s_mov_b32 s33, s32 +; GFX90A-V2A-EN-NEXT: s_or_saveexec_b64 s[18:19], -1 +; GFX90A-V2A-EN-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill +; GFX90A-V2A-EN-NEXT: s_mov_b64 exec, s[18:19] +; GFX90A-V2A-EN-NEXT: v_writelane_b32 v40, s16, 2 +; GFX90A-V2A-EN-NEXT: s_addk_i32 s32, 0x400 +; GFX90A-V2A-EN-NEXT: v_writelane_b32 v40, s30, 0 +; GFX90A-V2A-EN-NEXT: s_getpc_b64 s[16:17] +; GFX90A-V2A-EN-NEXT: s_add_u32 s16, s16, ex@rel32@lo+4 +; GFX90A-V2A-EN-NEXT: s_addc_u32 s17, s17, ex@rel32@hi+12 +; GFX90A-V2A-EN-NEXT: v_writelane_b32 v40, s31, 1 +; GFX90A-V2A-EN-NEXT: s_swappc_b64 s[30:31], s[16:17] +; GFX90A-V2A-EN-NEXT: v_readlane_b32 s31, v40, 1 +; GFX90A-V2A-EN-NEXT: v_readlane_b32 s30, v40, 0 +; GFX90A-V2A-EN-NEXT: s_mov_b32 s32, s33 +; GFX90A-V2A-EN-NEXT: v_readlane_b32 s4, v40, 2 +; GFX90A-V2A-EN-NEXT: s_or_saveexec_b64 s[6:7], -1 +; GFX90A-V2A-EN-NEXT: buffer_load_dword v40, off, s[0:3], s33 ; 4-byte Folded Reload +; GFX90A-V2A-EN-NEXT: s_mov_b64 exec, s[6:7] +; GFX90A-V2A-EN-NEXT: s_mov_b32 s33, s4 +; GFX90A-V2A-EN-NEXT: s_waitcnt vmcnt(0) +; GFX90A-V2A-EN-NEXT: s_setpc_b64 s[30:31] +; +; WAVE32-LABEL: func_call_clobber: +; WAVE32: .Lfunc_begin3: +; WAVE32-NEXT: .cfi_startproc +; WAVE32-NEXT: ; %bb.0: ; %entry +; WAVE32-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; WAVE32-NEXT: s_mov_b32 s16, s33 +; WAVE32-NEXT: s_mov_b32 s33, s32 +; WAVE32-NEXT: s_or_saveexec_b32 s17, -1 +; WAVE32-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill +; WAVE32-NEXT: s_waitcnt_depctr 0xffe3 +; WAVE32-NEXT: s_mov_b32 exec_lo, s17 +; WAVE32-NEXT: v_writelane_b32 v40, s16, 2 +; WAVE32-NEXT: s_addk_i32 s32, 0x200 +; WAVE32-NEXT: s_getpc_b64 s[16:17] +; WAVE32-NEXT: s_add_u32 s16, s16, ex@rel32@lo+4 +; WAVE32-NEXT: s_addc_u32 s17, s17, ex@rel32@hi+12 +; WAVE32-NEXT: v_writelane_b32 v40, s30, 0 +; WAVE32-NEXT: v_writelane_b32 v40, s31, 1 +; WAVE32-NEXT: s_swappc_b64 s[30:31], s[16:17] +; WAVE32-NEXT: v_readlane_b32 s31, v40, 1 +; WAVE32-NEXT: v_readlane_b32 s30, v40, 0 +; WAVE32-NEXT: s_mov_b32 s32, s33 +; WAVE32-NEXT: v_readlane_b32 s4, v40, 2 +; WAVE32-NEXT: s_or_saveexec_b32 s5, -1 +; WAVE32-NEXT: buffer_load_dword v40, off, s[0:3], s33 ; 4-byte Folded Reload +; WAVE32-NEXT: s_waitcnt_depctr 0xffe3 +; WAVE32-NEXT: s_mov_b32 exec_lo, s5 +; WAVE32-NEXT: s_mov_b32 s33, s4 +; WAVE32-NEXT: s_waitcnt vmcnt(0) +; WAVE32-NEXT: s_setpc_b64 s[30:31] +entry: + call void @ex() #0 + ret void +} + +define hidden void @func_spill_vgpr_to_vmem() #0 { +; GFX900-LABEL: func_spill_vgpr_to_vmem: +; GFX900: .Lfunc_begin4: +; GFX900-NEXT: .cfi_startproc +; GFX900-NEXT: ; %bb.0: ; %entry +; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v41, off, s[0:3], s32 ; 4-byte Folded Spill +; GFX900-NEXT: ;;#ASMSTART +; GFX900-NEXT: ; clobber +; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: ;;#ASMSTART +; GFX900-NEXT: ; clobber +; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: ;;#ASMSTART +; GFX900-NEXT: ; clobber +; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: ;;#ASMSTART +; GFX900-NEXT: ; clobber +; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: buffer_load_dword v41, off, s[0:3], s32 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; GFX900-NEXT: s_waitcnt vmcnt(0) +; GFX900-NEXT: s_setpc_b64 s[30:31] +; +; GFX90A-V2A-DIS-LABEL: func_spill_vgpr_to_vmem: +; GFX90A-V2A-DIS: .Lfunc_begin4: +; GFX90A-V2A-DIS-NEXT: .cfi_startproc +; GFX90A-V2A-DIS-NEXT: ; %bb.0: ; %entry +; GFX90A-V2A-DIS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword a32, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword a33, off, s[0:3], s32 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: ;;#ASMSTART +; GFX90A-V2A-DIS-NEXT: ; clobber +; GFX90A-V2A-DIS-NEXT: ;;#ASMEND +; GFX90A-V2A-DIS-NEXT: ;;#ASMSTART +; GFX90A-V2A-DIS-NEXT: ; clobber +; GFX90A-V2A-DIS-NEXT: ;;#ASMEND +; GFX90A-V2A-DIS-NEXT: ;;#ASMSTART +; GFX90A-V2A-DIS-NEXT: ; clobber +; GFX90A-V2A-DIS-NEXT: ;;#ASMEND +; GFX90A-V2A-DIS-NEXT: ;;#ASMSTART +; GFX90A-V2A-DIS-NEXT: ; clobber +; GFX90A-V2A-DIS-NEXT: ;;#ASMEND +; GFX90A-V2A-DIS-NEXT: buffer_load_dword a33, off, s[0:3], s32 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword a32, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: s_waitcnt vmcnt(0) +; GFX90A-V2A-DIS-NEXT: s_setpc_b64 s[30:31] +; +; GFX90A-V2A-EN-LABEL: func_spill_vgpr_to_vmem: +; GFX90A-V2A-EN: .Lfunc_begin4: +; GFX90A-V2A-EN-NEXT: .cfi_startproc +; GFX90A-V2A-EN-NEXT: ; %bb.0: ; %entry +; GFX90A-V2A-EN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a0, v40 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a1, v41 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v0, a32 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v1, a33 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: ;;#ASMSTART +; GFX90A-V2A-EN-NEXT: ; clobber +; GFX90A-V2A-EN-NEXT: ;;#ASMEND +; GFX90A-V2A-EN-NEXT: ;;#ASMSTART +; GFX90A-V2A-EN-NEXT: ; clobber +; GFX90A-V2A-EN-NEXT: ;;#ASMEND +; GFX90A-V2A-EN-NEXT: ;;#ASMSTART +; GFX90A-V2A-EN-NEXT: ; clobber +; GFX90A-V2A-EN-NEXT: ;;#ASMEND +; GFX90A-V2A-EN-NEXT: ;;#ASMSTART +; GFX90A-V2A-EN-NEXT: ; clobber +; GFX90A-V2A-EN-NEXT: ;;#ASMEND +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a33, v1 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a32, v0 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v41, a1 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v40, a0 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: s_setpc_b64 s[30:31] +; +; WAVE32-LABEL: func_spill_vgpr_to_vmem: +; WAVE32: .Lfunc_begin4: +; WAVE32-NEXT: .cfi_startproc +; WAVE32-NEXT: ; %bb.0: ; %entry +; WAVE32-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; WAVE32-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v41, off, s[0:3], s32 ; 4-byte Folded Spill +; WAVE32-NEXT: ;;#ASMSTART +; WAVE32-NEXT: ; clobber +; WAVE32-NEXT: ;;#ASMEND +; WAVE32-NEXT: ;;#ASMSTART +; WAVE32-NEXT: ; clobber +; WAVE32-NEXT: ;;#ASMEND +; WAVE32-NEXT: ;;#ASMSTART +; WAVE32-NEXT: ; clobber +; WAVE32-NEXT: ;;#ASMEND +; WAVE32-NEXT: ;;#ASMSTART +; WAVE32-NEXT: ; clobber +; WAVE32-NEXT: ;;#ASMEND +; WAVE32-NEXT: s_clause 0x1 +; WAVE32-NEXT: buffer_load_dword v41, off, s[0:3], s32 +; WAVE32-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:4 +; WAVE32-NEXT: s_waitcnt vmcnt(0) +; WAVE32-NEXT: s_setpc_b64 s[30:31] +entry: + call void asm sideeffect "; clobber", "~{v40}"() #0 + call void asm sideeffect "; clobber", "~{v41}"() #0 + call void asm sideeffect "; clobber", "~{a32}"() #0 + call void asm sideeffect "; clobber", "~{a33}"() #0 + ret void +} + +define hidden void @func_spill_vgpr_to_agpr() #2 { +; GFX900-LABEL: func_spill_vgpr_to_agpr: +; GFX900: .Lfunc_begin5: +; GFX900-NEXT: .cfi_startproc +; GFX900-NEXT: ; %bb.0: +; GFX900-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX900-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; GFX900-NEXT: buffer_store_dword v41, off, s[0:3], s32 ; 4-byte Folded Spill +; GFX900-NEXT: ;;#ASMSTART +; GFX900-NEXT: ; clobber +; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: ;;#ASMSTART +; GFX900-NEXT: ; clobber +; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: ;;#ASMSTART +; GFX900-NEXT: ; clobber +; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: ;;#ASMSTART +; GFX900-NEXT: ; clobber +; GFX900-NEXT: ;;#ASMEND +; GFX900-NEXT: buffer_load_dword v41, off, s[0:3], s32 ; 4-byte Folded Reload +; GFX900-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; GFX900-NEXT: s_waitcnt vmcnt(0) +; GFX900-NEXT: s_setpc_b64 s[30:31] +; +; GFX90A-V2A-DIS-LABEL: func_spill_vgpr_to_agpr: +; GFX90A-V2A-DIS: .Lfunc_begin5: +; GFX90A-V2A-DIS-NEXT: .cfi_startproc +; GFX90A-V2A-DIS-NEXT: ; %bb.0: +; GFX90A-V2A-DIS-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:12 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword v41, off, s[0:3], s32 offset:8 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword a32, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: buffer_store_dword a33, off, s[0:3], s32 ; 4-byte Folded Spill +; GFX90A-V2A-DIS-NEXT: ;;#ASMSTART +; GFX90A-V2A-DIS-NEXT: ; clobber +; GFX90A-V2A-DIS-NEXT: ;;#ASMEND +; GFX90A-V2A-DIS-NEXT: ;;#ASMSTART +; GFX90A-V2A-DIS-NEXT: ; clobber +; GFX90A-V2A-DIS-NEXT: ;;#ASMEND +; GFX90A-V2A-DIS-NEXT: ;;#ASMSTART +; GFX90A-V2A-DIS-NEXT: ; clobber +; GFX90A-V2A-DIS-NEXT: ;;#ASMEND +; GFX90A-V2A-DIS-NEXT: ;;#ASMSTART +; GFX90A-V2A-DIS-NEXT: ; clobber +; GFX90A-V2A-DIS-NEXT: ;;#ASMEND +; GFX90A-V2A-DIS-NEXT: buffer_load_dword a33, off, s[0:3], s32 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword a32, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v41, off, s[0:3], s32 offset:8 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:12 ; 4-byte Folded Reload +; GFX90A-V2A-DIS-NEXT: s_waitcnt vmcnt(0) +; GFX90A-V2A-DIS-NEXT: s_setpc_b64 s[30:31] +; +; GFX90A-V2A-EN-LABEL: func_spill_vgpr_to_agpr: +; GFX90A-V2A-EN: .Lfunc_begin5: +; GFX90A-V2A-EN-NEXT: .cfi_startproc +; GFX90A-V2A-EN-NEXT: ; %bb.0: +; GFX90A-V2A-EN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a0, v40 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a1, v41 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v0, a32 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v1, a33 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: ;;#ASMSTART +; GFX90A-V2A-EN-NEXT: ; clobber +; GFX90A-V2A-EN-NEXT: ;;#ASMEND +; GFX90A-V2A-EN-NEXT: ;;#ASMSTART +; GFX90A-V2A-EN-NEXT: ; clobber +; GFX90A-V2A-EN-NEXT: ;;#ASMEND +; GFX90A-V2A-EN-NEXT: ;;#ASMSTART +; GFX90A-V2A-EN-NEXT: ; clobber +; GFX90A-V2A-EN-NEXT: ;;#ASMEND +; GFX90A-V2A-EN-NEXT: ;;#ASMSTART +; GFX90A-V2A-EN-NEXT: ; clobber +; GFX90A-V2A-EN-NEXT: ;;#ASMEND +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a33, v1 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_write_b32 a32, v0 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v41, a1 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: v_accvgpr_read_b32 v40, a0 ; Reload Reuse +; GFX90A-V2A-EN-NEXT: s_setpc_b64 s[30:31] +; +; WAVE32-LABEL: func_spill_vgpr_to_agpr: +; WAVE32: .Lfunc_begin5: +; WAVE32-NEXT: .cfi_startproc +; WAVE32-NEXT: ; %bb.0: +; WAVE32-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) +; WAVE32-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill +; WAVE32-NEXT: buffer_store_dword v41, off, s[0:3], s32 ; 4-byte Folded Spill +; WAVE32-NEXT: ;;#ASMSTART +; WAVE32-NEXT: ; clobber +; WAVE32-NEXT: ;;#ASMEND +; WAVE32-NEXT: ;;#ASMSTART +; WAVE32-NEXT: ; clobber +; WAVE32-NEXT: ;;#ASMEND +; WAVE32-NEXT: ;;#ASMSTART +; WAVE32-NEXT: ; clobber +; WAVE32-NEXT: ;;#ASMEND +; WAVE32-NEXT: ;;#ASMSTART +; WAVE32-NEXT: ; clobber +; WAVE32-NEXT: ;;#ASMEND +; WAVE32-NEXT: s_clause 0x1 +; WAVE32-NEXT: buffer_load_dword v41, off, s[0:3], s32 +; WAVE32-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:4 +; WAVE32-NEXT: s_waitcnt vmcnt(0) +; WAVE32-NEXT: s_setpc_b64 s[30:31] + call void asm sideeffect "; clobber", "~{v40}"() + call void asm sideeffect "; clobber", "~{v41}"() + call void asm sideeffect "; clobber", "~{a32}"() + call void asm sideeffect "; clobber", "~{a33}"() + ret void +} + + +; NOTE: Number of VGPRs available to kernel, and in turn number of corresponding CFIs generated, +; is dependent on waves/WG size. Since the intent here is to check whether we generate the correct +; CFIs, doing it for any one set of details is sufficient which also makes the test insensitive to +; changes in those details. +attributes #0 = { nounwind "amdgpu-waves-per-eu"="1,1" "amdgpu-flat-work-group-size"="128,128" } +attributes #1 = { nounwind "amdgpu-waves-per-eu"="1,1" "amdgpu-flat-work-group-size"="128,128" "frame-pointer"="all" } +attributes #2 = { nounwind } + +!llvm.dbg.cu = !{!0} +!llvm.module.flags = !{!2, !3} + +!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, emissionKind: FullDebug) +!1 = !DIFile(filename: "filename", directory: "directory") +!2 = !{i32 7, !"Dwarf Version", i32 4} +!3 = !{i32 2, !"Debug Info Version", i32 3} diff --git a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir index 49a91e6f6f33b..dafd6cce2d878 100644 --- a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir +++ b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir @@ -445,6 +445,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__kernel__literal__fi_offset96__offset_literal ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_MOV_B32 164 @@ -453,17 +455,23 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__kernel__literal__fi_offset96__offset_literal ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_MOV_B32 164 ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7 ; ; FLATSCRW64-LABEL: name: s_add_i32__kernel__literal__fi_offset96__offset_literal - ; FLATSCRW64: renamable $sgpr7 = S_MOV_B32 164 + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $sgpr7 = S_MOV_B32 164 ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7 ; ; FLATSCRW32-LABEL: name: s_add_i32__kernel__literal__fi_offset96__offset_literal - ; FLATSCRW32: renamable $sgpr7 = S_MOV_B32 164 + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $sgpr7 = S_MOV_B32 164 ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7 renamable $sgpr7 = S_ADD_I32 68, %stack.1, implicit-def dead $scc SI_RETURN implicit $sgpr7 @@ -485,6 +493,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__kernel__literal__fi_offset96__offset_literal_live_scc ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 164, 0, implicit-def $scc @@ -493,17 +503,23 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__kernel__literal__fi_offset96__offset_literal_live_scc ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 164, 0, implicit-def $scc ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW64-LABEL: name: s_add_i32__kernel__literal__fi_offset96__offset_literal_live_scc - ; FLATSCRW64: renamable $sgpr7 = S_ADD_I32 164, 0, implicit-def $scc + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 164, 0, implicit-def $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW32-LABEL: name: s_add_i32__kernel__literal__fi_offset96__offset_literal_live_scc - ; FLATSCRW32: renamable $sgpr7 = S_ADD_I32 164, 0, implicit-def $scc + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 164, 0, implicit-def $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc renamable $sgpr7 = S_ADD_I32 68, %stack.1, implicit-def $scc SI_RETURN implicit $sgpr7, implicit $scc @@ -525,6 +541,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__kernel__fi_offset96__offset_literal__literal ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_MOV_B32 164 @@ -533,17 +551,23 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__kernel__fi_offset96__offset_literal__literal ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_MOV_B32 164 ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7 ; ; FLATSCRW64-LABEL: name: s_add_i32__kernel__fi_offset96__offset_literal__literal - ; FLATSCRW64: renamable $sgpr7 = S_MOV_B32 164 + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $sgpr7 = S_MOV_B32 164 ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7 ; ; FLATSCRW32-LABEL: name: s_add_i32__kernel__fi_offset96__offset_literal__literal - ; FLATSCRW32: renamable $sgpr7 = S_MOV_B32 164 + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $sgpr7 = S_MOV_B32 164 ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7 renamable $sgpr7 = S_ADD_I32 %stack.1, 68, implicit-def dead $scc SI_RETURN implicit $sgpr7 @@ -567,6 +591,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__kernel__sgpr__fi_literal_offset ; MUBUFW64: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 96, implicit-def dead $scc @@ -575,6 +601,8 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__kernel__sgpr__fi_literal_offset ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 96, implicit-def dead $scc @@ -583,12 +611,16 @@ body: | ; FLATSCRW64-LABEL: name: s_add_i32__kernel__sgpr__fi_literal_offset ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 96, implicit-def dead $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7 ; ; FLATSCRW32-LABEL: name: s_add_i32__kernel__sgpr__fi_literal_offset ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 96, implicit-def dead $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7 renamable $sgpr7 = S_ADD_I32 $sgpr8, %stack.1, implicit-def dead $scc @@ -613,6 +645,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__kernel__fi_literal_offset__sgpr ; MUBUFW64: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 96, $sgpr8, implicit-def dead $scc @@ -621,6 +655,8 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__kernel__fi_literal_offset__sgpr ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 96, $sgpr8, implicit-def dead $scc @@ -629,12 +665,16 @@ body: | ; FLATSCRW64-LABEL: name: s_add_i32__kernel__fi_literal_offset__sgpr ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 96, $sgpr8, implicit-def dead $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7 ; ; FLATSCRW32-LABEL: name: s_add_i32__kernel__fi_literal_offset__sgpr ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 96, $sgpr8, implicit-def dead $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7 renamable $sgpr7 = S_ADD_I32 %stack.1, $sgpr8, implicit-def dead $scc @@ -658,6 +698,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__kernel__sgpr__fi_offset0__live_scc ; MUBUFW64: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 0, implicit-def $scc @@ -666,6 +708,8 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__kernel__sgpr__fi_offset0__live_scc ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 0, implicit-def $scc @@ -674,12 +718,16 @@ body: | ; FLATSCRW64-LABEL: name: s_add_i32__kernel__sgpr__fi_offset0__live_scc ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 0, implicit-def $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW32-LABEL: name: s_add_i32__kernel__sgpr__fi_offset0__live_scc ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 0, implicit-def $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc renamable $sgpr7 = S_ADD_I32 $sgpr8, %stack.0, implicit-def $scc @@ -750,6 +798,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__kernel__sgpr__fi_literal_offset__live_scc ; MUBUFW64: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 96, implicit-def $scc @@ -758,6 +808,8 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__kernel__sgpr__fi_literal_offset__live_scc ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 96, implicit-def $scc @@ -766,12 +818,16 @@ body: | ; FLATSCRW64-LABEL: name: s_add_i32__kernel__sgpr__fi_literal_offset__live_scc ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 96, implicit-def $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW32-LABEL: name: s_add_i32__kernel__sgpr__fi_literal_offset__live_scc ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 96, implicit-def $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc renamable $sgpr7 = S_ADD_I32 $sgpr8, %stack.1, implicit-def $scc @@ -911,6 +967,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__kernel_inlineimm__fi_offset_32__total_offset_inlineimm ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 40, 0, implicit-def $scc @@ -919,17 +977,23 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__kernel_inlineimm__fi_offset_32__total_offset_inlineimm ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 40, 0, implicit-def $scc ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW64-LABEL: name: s_add_i32__kernel_inlineimm__fi_offset_32__total_offset_inlineimm - ; FLATSCRW64: renamable $sgpr7 = S_ADD_I32 40, 0, implicit-def $scc + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 40, 0, implicit-def $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW32-LABEL: name: s_add_i32__kernel_inlineimm__fi_offset_32__total_offset_inlineimm - ; FLATSCRW32: renamable $sgpr7 = S_ADD_I32 40, 0, implicit-def $scc + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 40, 0, implicit-def $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc renamable $sgpr7 = S_ADD_I32 8, %stack.1, implicit-def $scc SI_RETURN implicit $sgpr7, implicit $scc @@ -952,6 +1016,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__kernel_fi_offset_32__inlineimm__total_offset_inlineimm ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 0, 40, implicit-def $scc @@ -960,17 +1026,23 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__kernel_fi_offset_32__inlineimm__total_offset_inlineimm ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 0, 40, implicit-def $scc ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW64-LABEL: name: s_add_i32__kernel_fi_offset_32__inlineimm__total_offset_inlineimm - ; FLATSCRW64: renamable $sgpr7 = S_ADD_I32 0, 40, implicit-def $scc + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 0, 40, implicit-def $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW32-LABEL: name: s_add_i32__kernel_fi_offset_32__inlineimm__total_offset_inlineimm - ; FLATSCRW32: renamable $sgpr7 = S_ADD_I32 0, 40, implicit-def $scc + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 0, 40, implicit-def $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc renamable $sgpr7 = S_ADD_I32 %stack.1, 8, implicit-def $scc SI_RETURN implicit $sgpr7, implicit $scc @@ -1198,6 +1270,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__identity_sgpr__fi_offset0__kernel ; MUBUFW64: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr8 = COPY $sgpr8 @@ -1206,6 +1280,8 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__identity_sgpr__fi_offset0__kernel ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr8 = COPY $sgpr8 @@ -1214,12 +1290,16 @@ body: | ; FLATSCRW64-LABEL: name: s_add_i32__identity_sgpr__fi_offset0__kernel ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $sgpr8 = COPY $sgpr8 ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr8 ; ; FLATSCRW32-LABEL: name: s_add_i32__identity_sgpr__fi_offset0__kernel ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $sgpr8 = COPY $sgpr8 ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr8 renamable $sgpr8 = S_ADD_I32 $sgpr8, %stack.0, implicit-def dead $scc @@ -1244,6 +1324,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__fi_offset0__identity_sgpr__kernel ; MUBUFW64: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr8 = COPY $sgpr8 @@ -1252,6 +1334,8 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__fi_offset0__identity_sgpr__kernel ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr8 = COPY $sgpr8 @@ -1260,12 +1344,16 @@ body: | ; FLATSCRW64-LABEL: name: s_add_i32__fi_offset0__identity_sgpr__kernel ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $sgpr8 = COPY $sgpr8 ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr8 ; ; FLATSCRW32-LABEL: name: s_add_i32__fi_offset0__identity_sgpr__kernel ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $sgpr8 = COPY $sgpr8 ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr8 renamable $sgpr8 = S_ADD_I32 $sgpr8, %stack.0, implicit-def dead $scc @@ -1291,6 +1379,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__identity_sgpr__fi_offset32__kernel ; MUBUFW64: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr8 = S_ADD_I32 $sgpr8, 32, implicit-def dead $scc @@ -1299,6 +1389,8 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__identity_sgpr__fi_offset32__kernel ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr8 = S_ADD_I32 $sgpr8, 32, implicit-def dead $scc @@ -1307,12 +1399,16 @@ body: | ; FLATSCRW64-LABEL: name: s_add_i32__identity_sgpr__fi_offset32__kernel ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $sgpr8 = S_ADD_I32 $sgpr8, 32, implicit-def dead $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr8 ; ; FLATSCRW32-LABEL: name: s_add_i32__identity_sgpr__fi_offset32__kernel ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $sgpr8 = S_ADD_I32 $sgpr8, 32, implicit-def dead $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr8 renamable $sgpr8 = S_ADD_I32 $sgpr8, %stack.1, implicit-def dead $scc @@ -1338,6 +1434,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__fi_offset32__identity_sgpr__kernel ; MUBUFW64: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr8 = S_ADD_I32 $sgpr8, 32, implicit-def dead $scc @@ -1346,6 +1444,8 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__fi_offset32__identity_sgpr__kernel ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr8 = S_ADD_I32 $sgpr8, 32, implicit-def dead $scc @@ -1354,12 +1454,16 @@ body: | ; FLATSCRW64-LABEL: name: s_add_i32__fi_offset32__identity_sgpr__kernel ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $sgpr8 = S_ADD_I32 $sgpr8, 32, implicit-def dead $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr8 ; ; FLATSCRW32-LABEL: name: s_add_i32__fi_offset32__identity_sgpr__kernel ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $sgpr8 = S_ADD_I32 $sgpr8, 32, implicit-def dead $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr8 renamable $sgpr8 = S_ADD_I32 $sgpr8, %stack.1, implicit-def dead $scc diff --git a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-u32.mir b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-u32.mir index af61bd70f16b6..442018d21734a 100644 --- a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-u32.mir +++ b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-u32.mir @@ -58,6 +58,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_MOV_B32 164 @@ -66,17 +68,23 @@ body: | ; MUBUFW32-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_MOV_B32 164 ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7 ; ; FLATSCRW64-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal - ; FLATSCRW64: renamable $sgpr7 = S_MOV_B32 164 + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $sgpr7 = S_MOV_B32 164 ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7 ; ; FLATSCRW32-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal - ; FLATSCRW32: renamable $sgpr7 = S_MOV_B32 164 + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $sgpr7 = S_MOV_B32 164 ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7 renamable $sgpr7 = S_ADD_U32 68, %stack.1, implicit-def dead $scc SI_RETURN implicit $sgpr7 @@ -98,6 +106,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal_live_scc ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_U32 164, 0, implicit-def $scc @@ -106,17 +116,23 @@ body: | ; MUBUFW32-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal_live_scc ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_U32 164, 0, implicit-def $scc ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW64-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal_live_scc - ; FLATSCRW64: renamable $sgpr7 = S_ADD_U32 164, 0, implicit-def $scc + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_U32 164, 0, implicit-def $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW32-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal_live_scc - ; FLATSCRW32: renamable $sgpr7 = S_ADD_U32 164, 0, implicit-def $scc + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_U32 164, 0, implicit-def $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc renamable $sgpr7 = S_ADD_U32 68, %stack.1, implicit-def $scc SI_RETURN implicit $sgpr7, implicit $scc diff --git a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32-wave32.mir b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32-wave32.mir index 348743644ce4f..2a4b305f32cef 100644 --- a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32-wave32.mir +++ b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32-wave32.mir @@ -274,11 +274,15 @@ machineFunctionInfo: body: | bb.0: ; MUBUFW32-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp - ; MUBUFW32: renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 84, 0, 1, implicit $exec + ; MUBUFW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; MUBUFW32-NEXT: renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 84, 0, 1, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp - ; FLATSCRW32: renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 84, 0, 1, implicit $exec + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 84, 0, 1, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 12, %stack.1, 1, implicit $exec SI_RETURN implicit $vgpr0 @@ -337,12 +341,16 @@ body: | ; MUBUFW32-LABEL: name: v_add_co_u32_e64__kernel_fi_offset0__other_vgpr_live_after ; MUBUFW32: liveins: $vgpr1 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: renamable $vgpr0, renamable $sgpr8 = V_ADD_CO_U32_e64 $vgpr1, 0, 0, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 ; ; FLATSCRW32-LABEL: name: v_add_co_u32_e64__kernel_fi_offset0__other_vgpr_live_after ; FLATSCRW32: liveins: $vgpr1 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0, renamable $sgpr8 = V_ADD_CO_U32_e64 $vgpr1, 0, 0, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 renamable $vgpr0, renamable $sgpr8 = V_ADD_CO_U32_e64 renamable $vgpr1, %stack.0, 0, implicit $exec @@ -366,12 +374,16 @@ body: | ; MUBUFW32-LABEL: name: v_add_co_u32_e64__kernel__other_vgpr_live_after__fi_offset0 ; MUBUFW32: liveins: $vgpr1 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: renamable $vgpr0, renamable $sgpr8 = V_ADD_CO_U32_e64 0, $vgpr1, 0, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 ; ; FLATSCRW32-LABEL: name: v_add_co_u32_e64__kernel__other_vgpr_live_after__fi_offset0 ; FLATSCRW32: liveins: $vgpr1 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0, renamable $sgpr8 = V_ADD_CO_U32_e64 0, $vgpr1, 0, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 renamable $vgpr0, renamable $sgpr8 = V_ADD_CO_U32_e64 %stack.0, renamable $vgpr1, 0, implicit $exec @@ -396,11 +408,15 @@ body: | ; MUBUFW32-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset0__kernel ; MUBUFW32: liveins: $vgpr0 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset0__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, renamable dead $vcc_lo = V_ADD_CO_U32_e64 $vgpr0, %stack.0, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -424,11 +440,15 @@ body: | ; MUBUFW32-LABEL: name: v_add_co_u32_e64__fi_offset0__identity_vgpr__kernel ; MUBUFW32: liveins: $vgpr0 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_co_u32_e64__fi_offset0__identity_vgpr__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, renamable dead $vcc_lo = V_ADD_CO_U32_e64 %stack.0, $vgpr0, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -453,12 +473,16 @@ body: | ; MUBUFW32-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset32__kernel ; MUBUFW32: liveins: $vgpr0 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: renamable $vgpr0, dead renamable $vcc_lo = V_ADD_CO_U32_e64 $vgpr0, 32, 0, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset32__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0, dead renamable $vcc_lo = V_ADD_CO_U32_e64 $vgpr0, 32, 0, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, renamable dead $vcc_lo = V_ADD_CO_U32_e64 $vgpr0, %stack.1, 0, implicit $exec diff --git a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir index ade7b4266e9e6..ae53a3696fc2b 100644 --- a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir +++ b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir @@ -890,13 +890,17 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__inline_imm__fi_offset0__kernel ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec ; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__inline_imm__fi_offset0__kernel - ; FLATSCRW64: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_CO_U32_e32 12, %stack.0, implicit-def dead $vcc, implicit $exec SI_RETURN implicit $vgpr0 @@ -918,6 +922,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__inline_imm__fi_offset0__kernel__live_vcc ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $vgpr1 = V_MOV_B32_e32 0, implicit $exec @@ -925,7 +931,9 @@ body: | ; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc ; ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__inline_imm__fi_offset0__kernel__live_vcc - ; FLATSCRW64: $vgpr1 = V_MOV_B32_e32 0, implicit $exec + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 0, implicit $exec ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 12, killed $vgpr1, implicit-def $vcc, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc renamable $vgpr0 = V_ADD_CO_U32_e32 12, %stack.0, implicit-def $vcc, implicit $exec @@ -949,13 +957,17 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__inline_imm__fi_offset_literal__kernel ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 84, implicit $exec ; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__inline_imm__fi_offset_literal__kernel - ; FLATSCRW64: renamable $vgpr0 = V_MOV_B32_e32 84, implicit $exec + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 84, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_CO_U32_e32 12, %stack.1, implicit-def dead $vcc, implicit $exec SI_RETURN implicit $vgpr0 @@ -978,6 +990,8 @@ body: | ; GFX7-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp ; GFX7: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX7-NEXT: {{ $}} + ; GFX7-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX7-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX7-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX7-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX7-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec @@ -987,6 +1001,8 @@ body: | ; GFX8-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp ; GFX8: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX8-NEXT: {{ $}} + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX8-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX8-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec @@ -996,6 +1012,8 @@ body: | ; GFX900-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp ; GFX900: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX900-NEXT: {{ $}} + ; GFX900-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX900-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX900-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX900-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec @@ -1005,6 +1023,8 @@ body: | ; GFX90A-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp ; GFX90A: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A-NEXT: {{ $}} + ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX90A-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec @@ -1014,22 +1034,30 @@ body: | ; GFX10-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp ; GFX10: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX10-NEXT: {{ $}} + ; GFX10-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX10-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX10-NEXT: renamable $vgpr0, dead $vcc = V_ADD_CO_U32_e64 84, 0, 1, implicit $exec ; GFX10-NEXT: SI_RETURN implicit $vgpr0 ; ; GFX942-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp - ; GFX942: $sgpr4 = S_MOV_B32 72 + ; GFX942: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; GFX942-NEXT: $sgpr4 = S_MOV_B32 72 ; GFX942-NEXT: renamable $vgpr0, dead $vcc = V_ADD_CO_U32_e64 12, killed $sgpr4, 1, implicit $exec ; GFX942-NEXT: SI_RETURN implicit $vgpr0 ; ; GFX11-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp - ; GFX11: renamable $vgpr0, dead $vcc = V_ADD_CO_U32_e64 84, 0, 1, implicit $exec + ; GFX11: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; GFX11-NEXT: renamable $vgpr0, dead $vcc = V_ADD_CO_U32_e64 84, 0, 1, implicit $exec ; GFX11-NEXT: SI_RETURN implicit $vgpr0 ; ; GFX12-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp - ; GFX12: renamable $vgpr0, dead $vcc = V_ADD_CO_U32_e64 84, 0, 1, implicit $exec + ; GFX12: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX12-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; GFX12-NEXT: renamable $vgpr0, dead $vcc = V_ADD_CO_U32_e64 84, 0, 1, implicit $exec ; GFX12-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, dead $vcc = V_ADD_CO_U32_e64 12, %stack.1, 1, implicit $exec SI_RETURN implicit $vgpr0 @@ -1240,6 +1268,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__kernel_fi_offset0__other_vgpr_live_after ; MUBUFW64: liveins: $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec @@ -1248,6 +1278,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__kernel_fi_offset0__other_vgpr_live_after ; FLATSCRW64: liveins: $vgpr1 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 renamable $vgpr0 = V_ADD_CO_U32_e32 renamable $vgpr1, %stack.0, implicit-def dead $vcc, implicit $exec @@ -1271,6 +1303,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e64__kernel_fi_offset0__other_vgpr_live_after ; MUBUFW64: liveins: $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 $vgpr1, 0, 0, implicit $exec @@ -1279,6 +1313,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e64__kernel_fi_offset0__other_vgpr_live_after ; FLATSCRW64: liveins: $vgpr1 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 $vgpr1, 0, 0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 renamable $vgpr1, %stack.0, 0, implicit $exec @@ -1302,6 +1338,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e64__kernel__other_vgpr_live_after__fi_offset0 ; MUBUFW64: liveins: $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 0, $vgpr1, 0, implicit $exec @@ -1310,6 +1348,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e64__kernel__other_vgpr_live_after__fi_offset0 ; FLATSCRW64: liveins: $vgpr1 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 0, $vgpr1, 0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 %stack.0, renamable $vgpr1, 0, implicit $exec @@ -1334,6 +1374,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__identity_vgpr__fi_offset0__kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0 @@ -1341,6 +1383,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__identity_vgpr__fi_offset0__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_CO_U32_e32 $vgpr0, %stack.0, implicit-def dead $vcc, implicit $exec SI_RETURN implicit $vgpr0 @@ -1363,6 +1407,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__fi_offset0__identity_vgpr__kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0 @@ -1370,6 +1416,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__fi_offset0__identity_vgpr__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_CO_U32_e32 %stack.0, $vgpr0, implicit-def dead $vcc, implicit $exec SI_RETURN implicit $vgpr0 @@ -1393,6 +1441,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset0__kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0 @@ -1400,6 +1450,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset0__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, renamable dead $vcc = V_ADD_CO_U32_e64 $vgpr0, %stack.0, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -1423,6 +1475,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e64__fi_offset0__identity_vgpr__kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0 @@ -1430,6 +1484,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e64__fi_offset0__identity_vgpr__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, renamable dead $vcc = V_ADD_CO_U32_e64 %stack.0, $vgpr0, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -1452,6 +1508,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__fi_offset0__identity_vgpr__kernel_kill ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0 @@ -1459,6 +1517,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__fi_offset0__identity_vgpr__kernel_kill ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_CO_U32_e32 %stack.0, killed $vgpr0, implicit-def dead $vcc, implicit $exec SI_RETURN implicit $vgpr0 @@ -1481,6 +1541,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__fi_offset0__identity_vgpr__kernel_live_vcc ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 0, $vgpr0, implicit-def $vcc, implicit $exec @@ -1489,6 +1551,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__fi_offset0__identity_vgpr__kernel_live_vcc ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 0, $vgpr0, implicit-def $vcc, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc renamable $vgpr0 = V_ADD_CO_U32_e32 %stack.0, $vgpr0, implicit-def $vcc, implicit $exec @@ -1514,6 +1578,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__identity_vgpr__fi_offset32__kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 32, $vgpr0, implicit-def dead $vcc, implicit $exec @@ -1522,6 +1588,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__identity_vgpr__fi_offset32__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 32, $vgpr0, implicit-def dead $vcc, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_CO_U32_e32 $vgpr0, %stack.1, implicit-def dead $vcc, implicit $exec @@ -1548,6 +1616,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__identity_vgpr__fi_offset72__kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 72, $vgpr0, implicit-def dead $vcc, implicit $exec @@ -1556,6 +1626,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__identity_vgpr__fi_offset72__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 72, $vgpr0, implicit-def dead $vcc, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_CO_U32_e32 $vgpr0, %stack.1, implicit-def dead $vcc, implicit $exec @@ -1581,6 +1653,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__fi_offset72__identity_vgpr__kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 72, $vgpr0, implicit-def dead $vcc, implicit $exec @@ -1589,6 +1663,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__fi_offset72__identity_vgpr__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 72, $vgpr0, implicit-def dead $vcc, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_CO_U32_e32 %stack.1, $vgpr0, implicit-def dead $vcc, implicit $exec @@ -1614,6 +1690,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__fi_offset32__identity_vgpr__kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 32, $vgpr0, implicit-def dead $vcc, implicit $exec @@ -1622,6 +1700,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__fi_offset32__identity_vgpr__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 32, $vgpr0, implicit-def dead $vcc, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_CO_U32_e32 %stack.1, $vgpr0, implicit-def dead $vcc, implicit $exec @@ -1647,6 +1727,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset32__kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 $vgpr0, 32, 0, implicit $exec @@ -1655,6 +1737,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset32__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 $vgpr0, 32, 0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, renamable dead $vcc = V_ADD_CO_U32_e64 $vgpr0, %stack.1, 0, implicit $exec @@ -1679,6 +1763,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e64__fi_sgpr_kernel ; MUBUFW64: liveins: $sgpr4, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 killed $sgpr4, implicit $exec @@ -1687,6 +1773,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e64__fi_sgpr_kernel ; FLATSCRW64: liveins: $sgpr4 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 killed $sgpr4, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, dead renamable $sgpr4_sgpr5 = V_ADD_CO_U32_e64 %stack.0, killed $sgpr4, 0, implicit $exec @@ -1754,6 +1842,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e64__fi_inc_same_vgpr_kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0 @@ -1761,6 +1851,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e64__fi_inc_same_vgpr_kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, dead renamable $sgpr4_sgpr5 = V_ADD_CO_U32_e64 %stack.0, killed $vgpr0, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -1814,6 +1906,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e64__fi_sgpr_kernel_live_co ; MUBUFW64: liveins: $sgpr4, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0, renamable $sgpr4_sgpr5 = V_ADD_CO_U32_e64 0, killed $sgpr4, 0, implicit $exec @@ -1822,6 +1916,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e64__fi_sgpr_kernel_live_co ; FLATSCRW64: liveins: $sgpr4 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0, renamable $sgpr4_sgpr5 = V_ADD_CO_U32_e64 0, killed $sgpr4, 0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr4_sgpr5 renamable $vgpr0, renamable $sgpr4_sgpr5 = V_ADD_CO_U32_e64 %stack.0, killed $sgpr4, 0, implicit $exec @@ -1846,6 +1942,8 @@ body: | ; GFX7-LABEL: name: v_add_co_u32_e64_fi_sgpr_clobbered_register ; GFX7: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX7-NEXT: {{ $}} + ; GFX7-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX7-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX7-NEXT: $sgpr8_sgpr9_sgpr10_sgpr11 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX7-NEXT: $sgpr8 = S_ADD_U32 $sgpr8, $noreg, implicit-def $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX7-NEXT: $sgpr9 = S_ADDC_U32 $sgpr9, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 @@ -1858,6 +1956,8 @@ body: | ; GFX8-LABEL: name: v_add_co_u32_e64_fi_sgpr_clobbered_register ; GFX8: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX8-NEXT: {{ $}} + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: $sgpr8_sgpr9_sgpr10_sgpr11 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX8-NEXT: $sgpr8 = S_ADD_U32 $sgpr8, $noreg, implicit-def $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX8-NEXT: $sgpr9 = S_ADDC_U32 $sgpr9, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 @@ -1870,6 +1970,8 @@ body: | ; GFX900-LABEL: name: v_add_co_u32_e64_fi_sgpr_clobbered_register ; GFX900: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX900-NEXT: {{ $}} + ; GFX900-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX900-NEXT: $sgpr8_sgpr9_sgpr10_sgpr11 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX900-NEXT: $sgpr8 = S_ADD_U32 $sgpr8, $noreg, implicit-def $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX900-NEXT: $sgpr9 = S_ADDC_U32 $sgpr9, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 @@ -1882,6 +1984,8 @@ body: | ; GFX90A-LABEL: name: v_add_co_u32_e64_fi_sgpr_clobbered_register ; GFX90A: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A-NEXT: {{ $}} + ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX90A-NEXT: $sgpr8_sgpr9_sgpr10_sgpr11 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A-NEXT: $sgpr8 = S_ADD_U32 $sgpr8, $noreg, implicit-def $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX90A-NEXT: $sgpr9 = S_ADDC_U32 $sgpr9, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 @@ -1894,6 +1998,8 @@ body: | ; GFX10-LABEL: name: v_add_co_u32_e64_fi_sgpr_clobbered_register ; GFX10: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX10-NEXT: {{ $}} + ; GFX10-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10-NEXT: $sgpr96_sgpr97_sgpr98_sgpr99 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX10-NEXT: $sgpr96 = S_ADD_U32 $sgpr96, $noreg, implicit-def $scc, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99 ; GFX10-NEXT: $sgpr97 = S_ADDC_U32 $sgpr97, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99 @@ -1905,6 +2011,8 @@ body: | ; GFX942-LABEL: name: v_add_co_u32_e64_fi_sgpr_clobbered_register ; GFX942: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C ; GFX942-NEXT: {{ $}} + ; GFX942-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX942-NEXT: renamable $sgpr0 = S_LSHL_B32 renamable $sgpr6, 2, implicit-def dead $scc ; GFX942-NEXT: $vgpr1 = V_MOV_B32_e32 32772, implicit $exec ; GFX942-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 killed $vgpr1, killed $sgpr0, 0, implicit $exec @@ -1914,6 +2022,8 @@ body: | ; GFX11-LABEL: name: v_add_co_u32_e64_fi_sgpr_clobbered_register ; GFX11: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C ; GFX11-NEXT: {{ $}} + ; GFX11-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11-NEXT: renamable $sgpr0 = S_LSHL_B32 renamable $sgpr6, 2, implicit-def dead $scc ; GFX11-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 32772, killed $sgpr0, 0, implicit $exec ; GFX11-NEXT: renamable $vgpr0 = BUFFER_LOAD_DWORD_OFFEN killed renamable $vgpr0, $sgpr96_sgpr97_sgpr98_sgpr99, 0, 0, 0, 0, implicit $exec :: (load (s32), addrspace 5) @@ -1922,6 +2032,8 @@ body: | ; GFX12-LABEL: name: v_add_co_u32_e64_fi_sgpr_clobbered_register ; GFX12: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C ; GFX12-NEXT: {{ $}} + ; GFX12-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX12-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX12-NEXT: renamable $sgpr0 = S_LSHL_B32 renamable $sgpr6, 2, implicit-def dead $scc ; GFX12-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 32768, killed $sgpr0, 0, implicit $exec ; GFX12-NEXT: renamable $vgpr0 = BUFFER_LOAD_DWORD_OFFEN killed renamable $vgpr0, $sgpr96_sgpr97_sgpr98_sgpr99, 0, 0, 0, 0, implicit $exec :: (load (s32), addrspace 5) @@ -1950,6 +2062,8 @@ body: | ; GFX7-LABEL: name: v_add_co_u32_e64_sgpr_fi_clobbered_register ; GFX7: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX7-NEXT: {{ $}} + ; GFX7-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX7-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX7-NEXT: $sgpr8_sgpr9_sgpr10_sgpr11 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX7-NEXT: $sgpr8 = S_ADD_U32 $sgpr8, $noreg, implicit-def $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX7-NEXT: $sgpr9 = S_ADDC_U32 $sgpr9, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 @@ -1962,6 +2076,8 @@ body: | ; GFX8-LABEL: name: v_add_co_u32_e64_sgpr_fi_clobbered_register ; GFX8: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX8-NEXT: {{ $}} + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: $sgpr8_sgpr9_sgpr10_sgpr11 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX8-NEXT: $sgpr8 = S_ADD_U32 $sgpr8, $noreg, implicit-def $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX8-NEXT: $sgpr9 = S_ADDC_U32 $sgpr9, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 @@ -1974,6 +2090,8 @@ body: | ; GFX900-LABEL: name: v_add_co_u32_e64_sgpr_fi_clobbered_register ; GFX900: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX900-NEXT: {{ $}} + ; GFX900-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX900-NEXT: $sgpr8_sgpr9_sgpr10_sgpr11 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX900-NEXT: $sgpr8 = S_ADD_U32 $sgpr8, $noreg, implicit-def $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX900-NEXT: $sgpr9 = S_ADDC_U32 $sgpr9, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 @@ -1986,6 +2104,8 @@ body: | ; GFX90A-LABEL: name: v_add_co_u32_e64_sgpr_fi_clobbered_register ; GFX90A: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A-NEXT: {{ $}} + ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX90A-NEXT: $sgpr8_sgpr9_sgpr10_sgpr11 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A-NEXT: $sgpr8 = S_ADD_U32 $sgpr8, $noreg, implicit-def $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX90A-NEXT: $sgpr9 = S_ADDC_U32 $sgpr9, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 @@ -1998,6 +2118,8 @@ body: | ; GFX10-LABEL: name: v_add_co_u32_e64_sgpr_fi_clobbered_register ; GFX10: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX10-NEXT: {{ $}} + ; GFX10-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10-NEXT: $sgpr96_sgpr97_sgpr98_sgpr99 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX10-NEXT: $sgpr96 = S_ADD_U32 $sgpr96, $noreg, implicit-def $scc, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99 ; GFX10-NEXT: $sgpr97 = S_ADDC_U32 $sgpr97, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99 @@ -2009,6 +2131,8 @@ body: | ; GFX942-LABEL: name: v_add_co_u32_e64_sgpr_fi_clobbered_register ; GFX942: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C ; GFX942-NEXT: {{ $}} + ; GFX942-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX942-NEXT: renamable $sgpr0 = S_LSHL_B32 renamable $sgpr6, 2, implicit-def dead $scc ; GFX942-NEXT: $vgpr1 = V_MOV_B32_e32 32772, implicit $exec ; GFX942-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 killed $vgpr1, killed $sgpr0, 0, implicit $exec @@ -2018,6 +2142,8 @@ body: | ; GFX11-LABEL: name: v_add_co_u32_e64_sgpr_fi_clobbered_register ; GFX11: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C ; GFX11-NEXT: {{ $}} + ; GFX11-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11-NEXT: renamable $sgpr0 = S_LSHL_B32 renamable $sgpr6, 2, implicit-def dead $scc ; GFX11-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 32772, killed $sgpr0, 0, implicit $exec ; GFX11-NEXT: renamable $vgpr0 = BUFFER_LOAD_DWORD_OFFEN killed renamable $vgpr0, $sgpr96_sgpr97_sgpr98_sgpr99, 0, 0, 0, 0, implicit $exec :: (load (s32), addrspace 5) @@ -2026,6 +2152,8 @@ body: | ; GFX12-LABEL: name: v_add_co_u32_e64_sgpr_fi_clobbered_register ; GFX12: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C ; GFX12-NEXT: {{ $}} + ; GFX12-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX12-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX12-NEXT: renamable $sgpr0 = S_LSHL_B32 renamable $sgpr6, 2, implicit-def dead $scc ; GFX12-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 32768, killed $sgpr0, 0, implicit $exec ; GFX12-NEXT: renamable $vgpr0 = BUFFER_LOAD_DWORD_OFFEN killed renamable $vgpr0, $sgpr96_sgpr97_sgpr98_sgpr99, 0, 0, 0, 0, implicit $exec :: (load (s32), addrspace 5) diff --git a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir index 6a4671058dc0e..c5c9696ee355a 100644 --- a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir +++ b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir @@ -622,6 +622,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__fi_literal_offset__vgpr__clamp__kernel ; MUBUF: liveins: $vgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec @@ -631,6 +633,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__fi_literal_offset__vgpr__clamp__kernel ; MUBUFW32: liveins: $vgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 128, $vgpr8, 1, implicit $exec @@ -639,6 +643,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e64__fi_literal_offset__vgpr__clamp__kernel ; FLATSCRW64: liveins: $vgpr8 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e64 killed $vgpr1, $vgpr8, 1, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 @@ -646,6 +652,8 @@ body: | ; FLATSCRW32-LABEL: name: v_add_u32_e64__fi_literal_offset__vgpr__clamp__kernel ; FLATSCRW32: liveins: $vgpr8 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 128, $vgpr8, 1, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e64 %stack.1, $vgpr8, 1, implicit $exec @@ -668,6 +676,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__inline_imm__fi_offset0__kernel ; MUBUF: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec @@ -676,17 +686,23 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__inline_imm__fi_offset0__kernel ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW64-LABEL: name: v_add_u32_e32__inline_imm__fi_offset0__kernel - ; FLATSCRW64: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__inline_imm__fi_offset0__kernel - ; FLATSCRW32: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e32 12, %stack.0, implicit $exec SI_RETURN implicit $vgpr0 @@ -708,6 +724,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__inline_imm__fi_offset0__kernel ; MUBUF: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec @@ -716,17 +734,23 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__inline_imm__fi_offset0__kernel ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW64-LABEL: name: v_add_u32_e64__inline_imm__fi_offset0__kernel - ; FLATSCRW64: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e64__inline_imm__fi_offset0__kernel - ; FLATSCRW32: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e64 12, %stack.0, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -751,6 +775,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__inline_imm__fi_literal__kernel ; MUBUF: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec @@ -759,17 +785,23 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__inline_imm__fi_literal__kernel ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW64-LABEL: name: v_add_u32_e32__inline_imm__fi_literal__kernel - ; FLATSCRW64: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__inline_imm__fi_literal__kernel - ; FLATSCRW32: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e32 12, %stack.1, implicit $exec SI_RETURN implicit $vgpr0 @@ -792,6 +824,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__inline_imm__fi_literal__kernel ; MUBUF: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec @@ -800,17 +834,23 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__inline_imm__fi_literal__kernel ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW64-LABEL: name: v_add_u32_e64__inline_imm__fi_literal__kernel - ; FLATSCRW64: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e64__inline_imm__fi_literal__kernel - ; FLATSCRW32: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e64 12, %stack.1, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -833,6 +873,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__fi_literal__inline_imm__kernel ; MUBUF: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec @@ -841,17 +883,23 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__fi_literal__inline_imm__kernel ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW64-LABEL: name: v_add_u32_e64__fi_literal__inline_imm__kernel - ; FLATSCRW64: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e64__fi_literal__inline_imm__kernel - ; FLATSCRW32: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e64 %stack.1, 12, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -874,6 +922,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__inline_imm__fi_literal__kernel__clamp ; MUBUF: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e64 44, 0, 1, implicit $exec @@ -882,17 +932,23 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__inline_imm__fi_literal__kernel__clamp ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 44, 0, 1, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW64-LABEL: name: v_add_u32_e64__inline_imm__fi_literal__kernel__clamp - ; FLATSCRW64: renamable $vgpr0 = V_ADD_U32_e64 44, 0, 1, implicit $exec + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e64 44, 0, 1, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e64__inline_imm__fi_literal__kernel__clamp - ; FLATSCRW32: renamable $vgpr0 = V_ADD_U32_e64 44, 0, 1, implicit $exec + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 44, 0, 1, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e64 12, %stack.1, 1, implicit $exec SI_RETURN implicit $vgpr0 @@ -917,6 +973,8 @@ body: | ; MUBUF-LABEL: name: killed_reg_regression ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_LSHLREV_B32_e32 2, killed $vgpr0, implicit $exec @@ -930,6 +988,8 @@ body: | ; MUBUFW32-LABEL: name: killed_reg_regression ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_LSHLREV_B32_e32 2, killed $vgpr0, implicit $exec @@ -943,6 +1003,8 @@ body: | ; FLATSCRW64-LABEL: name: killed_reg_regression ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_LSHLREV_B32_e32 2, killed $vgpr0, implicit $exec ; FLATSCRW64-NEXT: renamable $vgpr1 = V_MOV_B32_e32 $vgpr0, implicit $exec ; FLATSCRW64-NEXT: renamable $vgpr2 = V_MOV_B32_e32 15, implicit $exec @@ -954,6 +1016,8 @@ body: | ; FLATSCRW32-LABEL: name: killed_reg_regression ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_LSHLREV_B32_e32 2, killed $vgpr0, implicit $exec ; FLATSCRW32-NEXT: renamable $vgpr1 = V_MOV_B32_e32 $vgpr0, implicit $exec ; FLATSCRW32-NEXT: renamable $vgpr2 = V_MOV_B32_e32 15, implicit $exec @@ -987,6 +1051,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__kernel_fi_offset0__other_vgpr_live_after ; MUBUF: liveins: $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec @@ -995,6 +1061,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__kernel_fi_offset0__other_vgpr_live_after ; MUBUFW32: liveins: $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec @@ -1003,12 +1071,16 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__kernel_fi_offset0__other_vgpr_live_after ; FLATSCRW64: liveins: $vgpr1 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__kernel_fi_offset0__other_vgpr_live_after ; FLATSCRW32: liveins: $vgpr1 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 renamable $vgpr0 = V_ADD_U32_e32 renamable $vgpr1, %stack.0, implicit $exec @@ -1032,6 +1104,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__kernel_other_vgpr_live_after__fi_offset0 ; MUBUF: liveins: $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec @@ -1040,6 +1114,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__kernel_other_vgpr_live_after__fi_offset0 ; MUBUFW32: liveins: $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec @@ -1048,12 +1124,16 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__kernel_other_vgpr_live_after__fi_offset0 ; FLATSCRW64: liveins: $vgpr1 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__kernel_other_vgpr_live_after__fi_offset0 ; FLATSCRW32: liveins: $vgpr1 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 renamable $vgpr0 = V_ADD_U32_e32 %stack.0, renamable $vgpr1, implicit $exec @@ -1077,6 +1157,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__kernel_fi_offset0__sgpr_live_after ; MUBUF: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $sgpr8, implicit $exec @@ -1085,6 +1167,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__kernel_fi_offset0__sgpr_live_after ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $sgpr8, implicit $exec @@ -1093,12 +1177,16 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__kernel_fi_offset0__sgpr_live_after ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $sgpr8, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__kernel_fi_offset0__sgpr_live_after ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $sgpr8, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8 renamable $vgpr0 = V_ADD_U32_e32 renamable $sgpr8, %stack.0, implicit $exec @@ -1122,6 +1210,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__kernel_fi_offset0__other_vgpr_live_after ; MUBUF: liveins: $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec @@ -1130,6 +1220,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__kernel_fi_offset0__other_vgpr_live_after ; MUBUFW32: liveins: $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec @@ -1138,12 +1230,16 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e64__kernel_fi_offset0__other_vgpr_live_after ; FLATSCRW64: liveins: $vgpr1 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 ; ; FLATSCRW32-LABEL: name: v_add_u32_e64__kernel_fi_offset0__other_vgpr_live_after ; FLATSCRW32: liveins: $vgpr1 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 renamable $vgpr0 = V_ADD_U32_e64 renamable $vgpr1, %stack.0, 0, implicit $exec @@ -1168,6 +1264,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__kernel_fi_offset72__sgpr_live_after ; MUBUF: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec @@ -1177,6 +1275,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__kernel_fi_offset72__sgpr_live_after ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec @@ -1186,6 +1286,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__kernel_fi_offset72__sgpr_live_after ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $sgpr8, killed $vgpr1, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8 @@ -1193,6 +1295,8 @@ body: | ; FLATSCRW32-LABEL: name: v_add_u32_e32__kernel_fi_offset72__sgpr_live_after ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $sgpr8, killed $vgpr1, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8 @@ -1218,6 +1322,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__kernel_fi_offset72__sgpr_live_after ; MUBUF: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec @@ -1227,6 +1333,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__kernel_fi_offset72__sgpr_live_after ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $sgpr8, 72, 0, implicit $exec @@ -1235,6 +1343,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e64__kernel_fi_offset72__sgpr_live_after ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e64 killed $vgpr1, $sgpr8, 0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8 @@ -1242,6 +1352,8 @@ body: | ; FLATSCRW32-LABEL: name: v_add_u32_e64__kernel_fi_offset72__sgpr_live_after ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $sgpr8, 72, 0, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8 renamable $vgpr0 = V_ADD_U32_e64 renamable $sgpr8, %stack.1, 0, implicit $exec @@ -1266,6 +1378,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset0__kernel ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: SI_RETURN implicit $vgpr0 @@ -1273,6 +1387,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset0__kernel ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 @@ -1280,11 +1396,15 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset0__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset0__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e32 $vgpr0, %stack.0, implicit $exec SI_RETURN implicit $vgpr0 @@ -1307,6 +1427,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__fi_offset0__identity_vgpr__kernel ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: SI_RETURN implicit $vgpr0 @@ -1314,6 +1436,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__fi_offset0__identity_vgpr__kernel ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 @@ -1321,11 +1445,15 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__fi_offset0__identity_vgpr__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__fi_offset0__identity_vgpr__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e32 %stack.0, $vgpr0, implicit $exec SI_RETURN implicit $vgpr0 @@ -1349,6 +1477,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__identity_vgpr__fi_offset0__kernel ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: SI_RETURN implicit $vgpr0 @@ -1356,6 +1486,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__identity_vgpr__fi_offset0__kernel ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 @@ -1363,11 +1495,15 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e64__identity_vgpr__fi_offset0__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e64__identity_vgpr__fi_offset0__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e64 $vgpr0, %stack.0, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -1391,6 +1527,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__fi_offset0__identity_vgpr__kernel ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: SI_RETURN implicit $vgpr0 @@ -1398,6 +1536,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__fi_offset0__identity_vgpr__kernel ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 @@ -1405,11 +1545,15 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e64__fi_offset0__identity_vgpr__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e64__fi_offset0__identity_vgpr__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e64 %stack.0, $vgpr0, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -1432,6 +1576,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__fi_offset0__identity_vgpr__kernel_kill ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: SI_RETURN implicit $vgpr0 @@ -1439,6 +1585,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__fi_offset0__identity_vgpr__kernel_kill ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 @@ -1446,11 +1594,15 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__fi_offset0__identity_vgpr__kernel_kill ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__fi_offset0__identity_vgpr__kernel_kill ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e32 %stack.0, killed $vgpr0, implicit $exec SI_RETURN implicit $vgpr0 @@ -1475,6 +1627,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset32__kernel ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e32 32, $vgpr0, implicit $exec @@ -1483,6 +1637,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset32__kernel ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 32, $vgpr0, implicit $exec @@ -1491,12 +1647,16 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset32__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 32, $vgpr0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset32__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 32, $vgpr0, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e32 $vgpr0, %stack.1, implicit $exec @@ -1523,6 +1683,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset72__kernel ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, $vgpr0, implicit $exec @@ -1531,6 +1693,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset72__kernel ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, $vgpr0, implicit $exec @@ -1539,12 +1703,16 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset72__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, $vgpr0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset72__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, $vgpr0, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e32 $vgpr0, %stack.1, implicit $exec @@ -1570,6 +1738,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__fi_offset72__identity_vgpr__kernel ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, $vgpr0, implicit $exec @@ -1578,6 +1748,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__fi_offset72__identity_vgpr__kernel ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, $vgpr0, implicit $exec @@ -1586,12 +1758,16 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__fi_offset72__identity_vgpr__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, $vgpr0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__fi_offset72__identity_vgpr__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, $vgpr0, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e32 %stack.1, $vgpr0, implicit $exec @@ -1617,6 +1793,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__fi_offset32__identity_vgpr__kernel ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e32 32, $vgpr0, implicit $exec @@ -1625,6 +1803,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__fi_offset32__identity_vgpr__kernel ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 32, $vgpr0, implicit $exec @@ -1633,12 +1813,16 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__fi_offset32__identity_vgpr__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 32, $vgpr0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__fi_offset32__identity_vgpr__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 32, $vgpr0, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e32 %stack.1, $vgpr0, implicit $exec @@ -1664,6 +1848,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__identity_vgpr__fi_offset32__kernel ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $vgpr0, 32, 0, implicit $exec @@ -1672,6 +1858,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__identity_vgpr__fi_offset32__kernel ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $vgpr0, 32, 0, implicit $exec @@ -1680,12 +1868,16 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e64__identity_vgpr__fi_offset32__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $vgpr0, 32, 0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e64__identity_vgpr__fi_offset32__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $vgpr0, 32, 0, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e64 $vgpr0, %stack.1, 0, implicit $exec diff --git a/llvm/test/CodeGen/AMDGPU/entry-function-cfi.mir b/llvm/test/CodeGen/AMDGPU/entry-function-cfi.mir new file mode 100644 index 0000000000000..dd2503502211f --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/entry-function-cfi.mir @@ -0,0 +1,34 @@ +# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5 +# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=prologepilog -o - %s | FileCheck %s + +--- | + + define protected amdgpu_kernel void @kern1() { + entry: + ret void + } +... +--- +name: kern1 +alignment: 1 +tracksRegLiveness: true +frameInfo: + maxAlignment: 1 +machineFunctionInfo: + maxKernArgAlign: 1 + isEntryFunction: true + scratchRSrcReg: '$sgpr100_sgpr101_sgpr102_sgpr103' + stackPtrOffsetReg: '$sgpr32' + argumentInfo: + workGroupIDX: { reg: '$sgpr0' } + privateSegmentWaveByteOffset: { reg: '$sgpr1' } + workItemIDX: { reg: '$vgpr0' } +body: | + bb.0: + ; CHECK-LABEL: name: kern1 + ; CHECK: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; CHECK-NEXT: S_ENDPGM 0 + S_ENDPGM 0 + +... diff --git a/llvm/test/CodeGen/AMDGPU/frame-index-elimination-tied-operand.mir b/llvm/test/CodeGen/AMDGPU/frame-index-elimination-tied-operand.mir index 17ec6f5b37241..e861a15981186 100644 --- a/llvm/test/CodeGen/AMDGPU/frame-index-elimination-tied-operand.mir +++ b/llvm/test/CodeGen/AMDGPU/frame-index-elimination-tied-operand.mir @@ -21,6 +21,8 @@ body: | ; GFX11-LABEL: name: tied_operand_test ; GFX11: liveins: $sgpr0_sgpr1 ; GFX11-NEXT: {{ $}} + ; GFX11-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11-NEXT: renamable $vgpr0 = V_MOV_B32_e32 123, implicit $exec ; GFX11-NEXT: renamable $vgpr0 = SCRATCH_LOAD_SHORT_D16_HI_ST 0, 0, killed renamable $vgpr0, implicit $exec, implicit $flat_scr ; GFX11-NEXT: renamable $sgpr0 = S_LOAD_DWORD_IMM killed renamable $sgpr0_sgpr1, 4, 0 diff --git a/llvm/test/CodeGen/AMDGPU/inflate-av-remat-imm.mir b/llvm/test/CodeGen/AMDGPU/inflate-av-remat-imm.mir index 4d8fb8db624f8..2872cfd212273 100644 --- a/llvm/test/CodeGen/AMDGPU/inflate-av-remat-imm.mir +++ b/llvm/test/CodeGen/AMDGPU/inflate-av-remat-imm.mir @@ -19,6 +19,8 @@ body: | ; CHECK-LABEL: name: av_mov_b32_split ; CHECK: liveins: $agpr3, $agpr4, $vgpr0, $sgpr4_sgpr5 ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: renamable $agpr0 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec ; CHECK-NEXT: renamable $agpr1 = V_ACCVGPR_WRITE_B32_e64 1, implicit $exec ; CHECK-NEXT: renamable $agpr2 = V_ACCVGPR_WRITE_B32_e64 2, implicit $exec @@ -68,6 +70,8 @@ body: | ; CHECK-LABEL: name: v_mov_b32_split ; CHECK: liveins: $agpr3, $agpr4, $vgpr0, $sgpr4_sgpr5 ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: renamable $vgpr0 = V_MOV_B32_e32 0, implicit $exec ; CHECK-NEXT: renamable $vgpr1 = V_MOV_B32_e32 1, implicit $exec ; CHECK-NEXT: renamable $vgpr2 = V_MOV_B32_e32 2, implicit $exec @@ -120,6 +124,8 @@ body: | ; CHECK-LABEL: name: av_mov_b64_split ; CHECK: liveins: $agpr6, $agpr7, $agpr8, $agpr9, $vgpr0, $sgpr4_sgpr5 ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec, implicit-def $agpr0_agpr1 ; CHECK-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec, implicit-def $agpr0_agpr1 ; CHECK-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 1, implicit $exec, implicit-def $agpr2_agpr3 diff --git a/llvm/test/CodeGen/AMDGPU/issue98474-assigned-physreg-interference.mir b/llvm/test/CodeGen/AMDGPU/issue98474-assigned-physreg-interference.mir index 786ce40203836..e44736584767b 100644 --- a/llvm/test/CodeGen/AMDGPU/issue98474-assigned-physreg-interference.mir +++ b/llvm/test/CodeGen/AMDGPU/issue98474-assigned-physreg-interference.mir @@ -14,6 +14,8 @@ body: | ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) ; CHECK-NEXT: liveins: $sgpr0, $vgpr2 ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: S_CMP_EQ_U32 $sgpr0, 0, implicit-def $scc ; CHECK-NEXT: S_CBRANCH_SCC0 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} diff --git a/llvm/test/CodeGen/AMDGPU/issue98474-virtregrewriter-live-out-undef-subregisters.mir b/llvm/test/CodeGen/AMDGPU/issue98474-virtregrewriter-live-out-undef-subregisters.mir index 86b6c5982b4cb..a244a433a4efb 100644 --- a/llvm/test/CodeGen/AMDGPU/issue98474-virtregrewriter-live-out-undef-subregisters.mir +++ b/llvm/test/CodeGen/AMDGPU/issue98474-virtregrewriter-live-out-undef-subregisters.mir @@ -19,6 +19,8 @@ body: | ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) ; CHECK-NEXT: liveins: $sgpr0 ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: S_CMP_EQ_U32 $sgpr0, 0, implicit-def $scc ; CHECK-NEXT: S_CBRANCH_SCC0 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} @@ -67,6 +69,8 @@ body: | ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) ; CHECK-NEXT: liveins: $sgpr0 ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: S_CMP_EQ_U32 $sgpr0, 0, implicit-def $scc ; CHECK-NEXT: S_CBRANCH_SCC0 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} @@ -115,6 +119,8 @@ body: | ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) ; CHECK-NEXT: liveins: $sgpr0 ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: S_CMP_EQ_U32 $sgpr0, 0, implicit-def $scc ; CHECK-NEXT: S_CBRANCH_SCC0 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} @@ -164,6 +170,8 @@ body: | ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) ; CHECK-NEXT: liveins: $sgpr0 ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: S_CMP_EQ_U32 $sgpr0, 0, implicit-def $scc ; CHECK-NEXT: S_CBRANCH_SCC0 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} @@ -215,6 +223,8 @@ body: | ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) ; CHECK-NEXT: liveins: $sgpr0 ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: S_CMP_EQ_U32 $sgpr0, 0, implicit-def $scc ; CHECK-NEXT: S_CBRANCH_SCC0 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} diff --git a/llvm/test/CodeGen/AMDGPU/kernel-mubuf-with-voffset.mir b/llvm/test/CodeGen/AMDGPU/kernel-mubuf-with-voffset.mir index 7a913cf50ea2b..f96c3c56896c0 100644 --- a/llvm/test/CodeGen/AMDGPU/kernel-mubuf-with-voffset.mir +++ b/llvm/test/CodeGen/AMDGPU/kernel-mubuf-with-voffset.mir @@ -31,6 +31,8 @@ body: | ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) ; CHECK-NEXT: liveins: $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: $sgpr33 = S_MOV_B32 0 ; CHECK-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; CHECK-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 diff --git a/llvm/test/CodeGen/AMDGPU/llvm.dbg.value.ll b/llvm/test/CodeGen/AMDGPU/llvm.dbg.value.ll index 4d23fb116cd03..294d8bbbeba63 100644 --- a/llvm/test/CodeGen/AMDGPU/llvm.dbg.value.ll +++ b/llvm/test/CodeGen/AMDGPU/llvm.dbg.value.ll @@ -22,6 +22,8 @@ entry: ; GCN-LABEL: {{^}}only_undef_dbg_value: ; NOOPT: ;DEBUG_VALUE: test_debug_value:globalptr_arg <- undef +; NOOPT-NEXT: .cfi_escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 ; CFA is 0 in private_wave aspace +; NOOPT-NEXT: .cfi_undefined 16 ; NOOPT-NEXT: s_endpgm ; OPT: s_endpgm diff --git a/llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll b/llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll index 2aae26b9470a8..34dd69f966637 100644 --- a/llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll +++ b/llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll @@ -33,6 +33,8 @@ define amdgpu_kernel void @partial_copy(<4 x i32> %arg) #0 { ; PEI-GFX908: bb.0 (%ir-block.0): ; PEI-GFX908-NEXT: liveins: $agpr4, $sgpr4_sgpr5, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr9 ; PEI-GFX908-NEXT: {{ $}} + ; PEI-GFX908-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; PEI-GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; PEI-GFX908-NEXT: $sgpr12_sgpr13_sgpr14_sgpr15 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; PEI-GFX908-NEXT: $sgpr12 = S_ADD_U32 $sgpr12, $sgpr9, implicit-def $scc, implicit-def $sgpr12_sgpr13_sgpr14_sgpr15 ; PEI-GFX908-NEXT: $sgpr13 = S_ADDC_U32 $sgpr13, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr12_sgpr13_sgpr14_sgpr15 @@ -79,6 +81,8 @@ define amdgpu_kernel void @partial_copy(<4 x i32> %arg) #0 { ; PEI-GFX90A: bb.0 (%ir-block.0): ; PEI-GFX90A-NEXT: liveins: $sgpr4_sgpr5 ; PEI-GFX90A-NEXT: {{ $}} + ; PEI-GFX90A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; PEI-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; PEI-GFX90A-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:AGPR_32 */, undef renamable $agpr0 ; PEI-GFX90A-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 7929866 /* regdef:VReg_128_Align2 */, def renamable $vgpr0_vgpr1_vgpr2_vgpr3 ; PEI-GFX90A-NEXT: renamable $agpr0_agpr1_agpr2_agpr3 = COPY killed renamable $vgpr0_vgpr1_vgpr2_vgpr3, implicit $exec diff --git a/llvm/test/CodeGen/AMDGPU/pei-reg-scavenger-position.mir b/llvm/test/CodeGen/AMDGPU/pei-reg-scavenger-position.mir index aa4428f3da4eb..8027373123d61 100644 --- a/llvm/test/CodeGen/AMDGPU/pei-reg-scavenger-position.mir +++ b/llvm/test/CodeGen/AMDGPU/pei-reg-scavenger-position.mir @@ -27,6 +27,8 @@ body: | ; CHECK-NEXT: successors: %bb.1(0x80000000) ; CHECK-NEXT: liveins: $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4 ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $sgpr4, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; CHECK-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; CHECK-NEXT: $sgpr4 = S_MOV_B32 524288 diff --git a/llvm/test/CodeGen/AMDGPU/regalloc-introduces-copy-sgpr-to-agpr.mir b/llvm/test/CodeGen/AMDGPU/regalloc-introduces-copy-sgpr-to-agpr.mir index e4cbae66d47fa..7f12571a6bdb4 100644 --- a/llvm/test/CodeGen/AMDGPU/regalloc-introduces-copy-sgpr-to-agpr.mir +++ b/llvm/test/CodeGen/AMDGPU/regalloc-introduces-copy-sgpr-to-agpr.mir @@ -36,6 +36,8 @@ body: | ; GFX908-LABEL: name: regalloc_introduces_s_to_a_copy ; GFX908: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15, $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31, $sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47, $sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63, $vgpr32_vgpr33_vgpr34_vgpr35, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr7 ; GFX908-NEXT: {{ $}} + ; GFX908-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX908-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $sgpr7, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX908-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX908-NEXT: renamable $vgpr34 = GLOBAL_LOAD_DWORD undef $vgpr0_vgpr1, 0, 0, implicit $exec diff --git a/llvm/test/CodeGen/AMDGPU/sgpr-spill-dead-frame-in-dbg-value.mir b/llvm/test/CodeGen/AMDGPU/sgpr-spill-dead-frame-in-dbg-value.mir index 520717391b596..2f6c628d290ea 100644 --- a/llvm/test/CodeGen/AMDGPU/sgpr-spill-dead-frame-in-dbg-value.mir +++ b/llvm/test/CodeGen/AMDGPU/sgpr-spill-dead-frame-in-dbg-value.mir @@ -59,6 +59,8 @@ body: | ; PEI: bb.0: ; PEI-NEXT: successors: %bb.1(0x80000000) ; PEI-NEXT: {{ $}} + ; PEI-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; PEI-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; PEI-NEXT: renamable $sgpr10 = IMPLICIT_DEF ; PEI-NEXT: $vgpr0 = IMPLICIT_DEF ; PEI-NEXT: $vgpr0 = SI_SPILL_S32_TO_VGPR killed $sgpr10, 0, killed $vgpr0 diff --git a/llvm/test/CodeGen/AMDGPU/sgpr-spill.mir b/llvm/test/CodeGen/AMDGPU/sgpr-spill.mir index ba2e80fdc04c8..92c4249b26069 100644 --- a/llvm/test/CodeGen/AMDGPU/sgpr-spill.mir +++ b/llvm/test/CodeGen/AMDGPU/sgpr-spill.mir @@ -58,6 +58,8 @@ body: | ; GCN64-MUBUF-LABEL: name: check_spill ; GCN64-MUBUF: liveins: $sgpr8, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr11 ; GCN64-MUBUF-NEXT: {{ $}} + ; GCN64-MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GCN64-MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GCN64-MUBUF-NEXT: $sgpr33 = S_MOV_B32 0 ; GCN64-MUBUF-NEXT: $sgpr28 = S_MOV_B32 &SCRATCH_RSRC_DWORD0, implicit-def $sgpr28_sgpr29_sgpr30_sgpr31 ; GCN64-MUBUF-NEXT: $sgpr29 = S_MOV_B32 &SCRATCH_RSRC_DWORD1, implicit-def $sgpr28_sgpr29_sgpr30_sgpr31 @@ -222,6 +224,8 @@ body: | ; GCN32-MUBUF-LABEL: name: check_spill ; GCN32-MUBUF: liveins: $sgpr8, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr11 ; GCN32-MUBUF-NEXT: {{ $}} + ; GCN32-MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GCN32-MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GCN32-MUBUF-NEXT: $sgpr33 = S_MOV_B32 0 ; GCN32-MUBUF-NEXT: $sgpr96 = S_MOV_B32 &SCRATCH_RSRC_DWORD0, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99 ; GCN32-MUBUF-NEXT: $sgpr97 = S_MOV_B32 &SCRATCH_RSRC_DWORD1, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99 @@ -386,6 +390,8 @@ body: | ; GCN64-FLATSCR-LABEL: name: check_spill ; GCN64-FLATSCR: liveins: $sgpr8, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr11, $sgpr0_sgpr1 ; GCN64-FLATSCR-NEXT: {{ $}} + ; GCN64-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GCN64-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GCN64-FLATSCR-NEXT: $sgpr33 = S_MOV_B32 0 ; GCN64-FLATSCR-NEXT: $flat_scr_lo = S_ADD_U32 $sgpr0, $sgpr11, implicit-def $scc ; GCN64-FLATSCR-NEXT: $flat_scr_hi = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc @@ -617,6 +623,8 @@ body: | ; GCN64-MUBUF-LABEL: name: check_reload ; GCN64-MUBUF: liveins: $sgpr8, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr11 ; GCN64-MUBUF-NEXT: {{ $}} + ; GCN64-MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GCN64-MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GCN64-MUBUF-NEXT: $sgpr33 = S_MOV_B32 0 ; GCN64-MUBUF-NEXT: $sgpr28 = S_MOV_B32 &SCRATCH_RSRC_DWORD0, implicit-def $sgpr28_sgpr29_sgpr30_sgpr31 ; GCN64-MUBUF-NEXT: $sgpr29 = S_MOV_B32 &SCRATCH_RSRC_DWORD1, implicit-def $sgpr28_sgpr29_sgpr30_sgpr31 @@ -755,6 +763,8 @@ body: | ; GCN32-MUBUF-LABEL: name: check_reload ; GCN32-MUBUF: liveins: $sgpr8, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr11 ; GCN32-MUBUF-NEXT: {{ $}} + ; GCN32-MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GCN32-MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GCN32-MUBUF-NEXT: $sgpr33 = S_MOV_B32 0 ; GCN32-MUBUF-NEXT: $sgpr96 = S_MOV_B32 &SCRATCH_RSRC_DWORD0, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99 ; GCN32-MUBUF-NEXT: $sgpr97 = S_MOV_B32 &SCRATCH_RSRC_DWORD1, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99 @@ -893,6 +903,8 @@ body: | ; GCN64-FLATSCR-LABEL: name: check_reload ; GCN64-FLATSCR: liveins: $sgpr8, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr11, $sgpr0_sgpr1 ; GCN64-FLATSCR-NEXT: {{ $}} + ; GCN64-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GCN64-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GCN64-FLATSCR-NEXT: $sgpr33 = S_MOV_B32 0 ; GCN64-FLATSCR-NEXT: $flat_scr_lo = S_ADD_U32 $sgpr0, $sgpr11, implicit-def $scc ; GCN64-FLATSCR-NEXT: $flat_scr_hi = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc diff --git a/llvm/test/CodeGen/AMDGPU/spill-special-sgpr.mir b/llvm/test/CodeGen/AMDGPU/spill-special-sgpr.mir index 639bf6a6d550c..3531b3dd75792 100644 --- a/llvm/test/CodeGen/AMDGPU/spill-special-sgpr.mir +++ b/llvm/test/CodeGen/AMDGPU/spill-special-sgpr.mir @@ -40,6 +40,8 @@ body: | ; GFX9-LABEL: name: check_vcc ; GFX9: liveins: $sgpr8, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr9 ; GFX9-NEXT: {{ $}} + ; GFX9-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX9-NEXT: $sgpr33 = S_MOV_B32 0 ; GFX9-NEXT: $sgpr12 = S_MOV_B32 &SCRATCH_RSRC_DWORD0, implicit-def $sgpr12_sgpr13_sgpr14_sgpr15 ; GFX9-NEXT: $sgpr13 = S_MOV_B32 &SCRATCH_RSRC_DWORD1, implicit-def $sgpr12_sgpr13_sgpr14_sgpr15 @@ -77,6 +79,8 @@ body: | ; GFX10-LABEL: name: check_vcc ; GFX10: liveins: $sgpr8, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr9 ; GFX10-NEXT: {{ $}} + ; GFX10-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10-NEXT: $sgpr33 = S_MOV_B32 0 ; GFX10-NEXT: $sgpr96 = S_MOV_B32 &SCRATCH_RSRC_DWORD0, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99 ; GFX10-NEXT: $sgpr97 = S_MOV_B32 &SCRATCH_RSRC_DWORD1, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99 @@ -114,6 +118,8 @@ body: | ; GFX11-LABEL: name: check_vcc ; GFX11: liveins: $sgpr8, $sgpr4_sgpr5, $sgpr6_sgpr7 ; GFX11-NEXT: {{ $}} + ; GFX11-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11-NEXT: $sgpr33 = S_MOV_B32 0 ; GFX11-NEXT: $vcc = IMPLICIT_DEF ; GFX11-NEXT: $sgpr0_sgpr1 = S_MOV_B64 $exec diff --git a/llvm/test/CodeGen/AMDGPU/transform-block-with-return-to-epilog.ll b/llvm/test/CodeGen/AMDGPU/transform-block-with-return-to-epilog.ll index 0cf26be3ac24f..42386385a8016 100644 --- a/llvm/test/CodeGen/AMDGPU/transform-block-with-return-to-epilog.ll +++ b/llvm/test/CodeGen/AMDGPU/transform-block-with-return-to-epilog.ll @@ -7,6 +7,8 @@ define amdgpu_ps float @simple_test_return_to_epilog(float %a) #0 { ; GCN: bb.0.entry: ; GCN-NEXT: liveins: $vgpr0 ; GCN-NEXT: {{ $}} + ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GCN-NEXT: SI_RETURN_TO_EPILOG killed $vgpr0 entry: ret float %a @@ -18,6 +20,8 @@ define amdgpu_ps float @test_return_to_epilog_into_end_block(i32 inreg %a, float ; GCN-NEXT: successors: %bb.1(0x80000000), %bb.2(0x00000000) ; GCN-NEXT: liveins: $sgpr2, $vgpr0 ; GCN-NEXT: {{ $}} + ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GCN-NEXT: S_CMP_LT_I32 killed renamable $sgpr2, 1, implicit-def $scc ; GCN-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; GCN-NEXT: {{ $}} @@ -51,6 +55,8 @@ define amdgpu_ps float @test_unify_return_to_epilog_into_end_block(i32 inreg %a, ; GCN-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000) ; GCN-NEXT: liveins: $sgpr2, $sgpr3, $vgpr0, $vgpr1 ; GCN-NEXT: {{ $}} + ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GCN-NEXT: S_CMP_LT_I32 killed renamable $sgpr2, 1, implicit-def $scc ; GCN-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; GCN-NEXT: {{ $}} @@ -103,6 +109,8 @@ define amdgpu_ps { <4 x float> } @test_return_to_epilog_with_optimized_kill(floa ; GCN-NEXT: successors: %bb.3(0x40000000), %bb.1(0x40000000) ; GCN-NEXT: liveins: $vgpr0 ; GCN-NEXT: {{ $}} + ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GCN-NEXT: renamable $vgpr1 = nofpexcept V_RCP_F32_e32 $vgpr0, implicit $mode, implicit $exec ; GCN-NEXT: $sgpr0_sgpr1 = S_MOV_B64 $exec ; GCN-NEXT: nofpexcept V_CMP_NGT_F32_e32 0, killed $vgpr1, implicit-def $vcc, implicit $mode, implicit $exec From 9b9d41eb43150c4a779f8fe70661952596b8dedd Mon Sep 17 00:00:00 2001 From: Scott Linder Date: Fri, 24 Oct 2025 21:40:10 +0000 Subject: [PATCH 2/4] Delete redundant MCRegisterInfo variable --- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp index 699194faf0470..cfbeda7656e46 100644 --- a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp @@ -626,7 +626,6 @@ void SIFrameLowering::emitEntryFunctionPrologue(MachineFunction &MF, const SIRegisterInfo *TRI = &TII->getRegisterInfo(); MachineRegisterInfo &MRI = MF.getRegInfo(); const Function &F = MF.getFunction(); - const MCRegisterInfo *MCRI = MF.getContext().getRegisterInfo(); MachineFrameInfo &FrameInfo = MF.getFrameInfo(); assert(MFI->isEntryFunction()); @@ -656,7 +655,7 @@ void SIFrameLowering::emitEntryFunctionPrologue(MachineFunction &MF, // Unwinding halts when the return address (PC) is undefined. buildCFI(MBB, I, DL, MCCFIInstruction::createUndefined( - nullptr, MCRI->getDwarfRegNum(AMDGPU::PC_REG, false))); + nullptr, TRI->getDwarfRegNum(AMDGPU::PC_REG, false))); } Register PreloadedScratchWaveOffsetReg = MFI->getPreloadedReg( From 9bd44a81b9f6605df332350d2d687efe7cca2662 Mon Sep 17 00:00:00 2001 From: Scott Linder Date: Tue, 4 Nov 2025 22:29:08 +0000 Subject: [PATCH 3/4] Respect MachineFunction::needsFrameMoves Use nounwind to try to avoid cluttering tests --- llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 11 +- .../memory-legalizer-atomic-fence.ll | 2 +- .../eliminate-frame-index-s-add-i32.mir | 166 ++++------- .../eliminate-frame-index-s-add-u32.mir | 31 +-- ...minate-frame-index-v-add-co-u32-wave32.mir | 48 ++-- .../eliminate-frame-index-v-add-co-u32.mir | 197 +++++-------- .../eliminate-frame-index-v-add-u32.mir | 259 ++++-------------- .../frame-index-elimination-tied-operand.mir | 10 +- .../CodeGen/AMDGPU/inflate-av-remat-imm.mir | 13 +- ...sue98474-assigned-physreg-interference.mir | 7 +- ...egrewriter-live-out-undef-subregisters.mir | 20 +- .../AMDGPU/kernel-mubuf-with-voffset.mir | 4 +- ...al-regcopy-and-spill-missed-at-regalloc.ll | 4 - .../AMDGPU/pei-reg-scavenger-position.mir | 7 +- .../regalloc-introduces-copy-sgpr-to-agpr.mir | 4 +- llvm/test/CodeGen/AMDGPU/sgpr-spill.mir | 14 +- .../CodeGen/AMDGPU/spill-special-sgpr.mir | 8 +- .../transform-block-with-return-to-epilog.ll | 8 - 18 files changed, 244 insertions(+), 569 deletions(-) diff --git a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp index cfbeda7656e46..cd4340c761958 100644 --- a/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp @@ -45,15 +45,6 @@ static MCRegister findUnusedRegister(MachineRegisterInfo &MRI, return MCRegister(); } -static bool needsFrameMoves(const MachineFunction &MF) { - // FIXME: There are some places in the compiler which are sensitive to the CFI - // pseudos and so using MachineFunction::needsFrameMoves has the unintended - // effect of making enabling debug info affect codegen. Once we have - // identified and fixed those cases this should be replaced with - // MF.needsFrameMoves() - return true; -} - // Find a scratch register that we can use in the prologue. We avoid using // callee-save registers since they may appear to be free when this is called // from canUseAsPrologue (during shrink wrapping), but then no longer be free @@ -635,7 +626,7 @@ void SIFrameLowering::emitEntryFunctionPrologue(MachineFunction &MF, DebugLoc DL; MachineBasicBlock::iterator I = MBB.begin(); - if (needsFrameMoves(MF)) { + if (MF.needsFrameMoves()) { // On entry the SP/FP are not set up, so we need to define the CFA in terms // of a literal location expression. static const char CFAEncodedInstUserOpsArr[] = { diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/memory-legalizer-atomic-fence.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/memory-legalizer-atomic-fence.ll index 23bab2b53f7f5..ba95171ba5005 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/memory-legalizer-atomic-fence.ll +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/memory-legalizer-atomic-fence.ll @@ -2020,4 +2020,4 @@ entry: ret void } -attributes #0 = { "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" } +attributes #0 = { "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" nounwind } diff --git a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir index dafd6cce2d878..bd5dc4b2af318 100644 --- a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir +++ b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir @@ -9,6 +9,48 @@ # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=FLATSCRW32 %s # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=FLATSCRW32 %s +--- | + define void @s_add_i32__inline_imm__fi_offset0() #0 { unreachable } + define void @s_add_i32__fi_offset0__inline_imm() #0 { unreachable } + define void @s_add_i32__inline_imm___fi_offset_inline_imm() #0 { unreachable } + define void @s_add_i32__literal__fi_offset0() #0 { unreachable } + define void @s_add_i32__fi_offset0__literal() #0 { unreachable } + define void @s_add_i32__literal__fi_offset96() #0 { unreachable } + define void @s_add_i32____fi_offset96__literal() #0 { unreachable } + define void @s_add_i32__sgpr__fi_offset0() #0 { unreachable } + define void @s_add_i32__fi_offset0__sgpr() #0 { unreachable } + define void @s_add_i32__sgpr__fi_literal_offset() #0 { unreachable } + define void @s_add_i32__fi_literal_offset__sgpr() #0 { unreachable } + define void @s_add_i32__kernel__literal__fi_offset96__offset_literal() #0 { unreachable } + define void @s_add_i32__kernel__literal__fi_offset96__offset_literal_live_scc() #0 { unreachable } + define void @s_add_i32__kernel__fi_offset96__offset_literal__literal() #0 { unreachable } + define void @s_add_i32__kernel__sgpr__fi_literal_offset() #0 { unreachable } + define void @s_add_i32__kernel__fi_literal_offset__sgpr() #0 { unreachable } + define void @s_add_i32__kernel__sgpr__fi_offset0__live_scc() #0 { unreachable } + define void @s_add_i32__sgpr__fi_offset0__live_scc() #0 { unreachable } + define void @s_add_i32__kernel__sgpr__fi_literal_offset__live_scc() #0 { unreachable } + define void @s_add_i32__sgpr__fi_literal_offset__live_scc() #0 { unreachable } + define void @s_add_i32__inlineimm__fi_offset_32__total_offset_inlineimm() #0 { unreachable } + define void @s_add_i32__fi_offset_32__inlineimm__total_offset_inlineimm() #0 { unreachable } + define void @s_add_i32__kernel_inlineimm__fi_offset_32__total_offset_inlineimm() #0 { unreachable } + define void @s_add_i32__kernel_fi_offset_32__inlineimm__total_offset_inlineimm() #0 { unreachable } + define void @s_add_i32__0__fi_offset0() #0 { unreachable } + define void @s_add_i32__fi_offset0__0() #0 { unreachable } + define void @s_add_i32__same_sgpr__fi_offset0() #0 { unreachable } + define void @s_add_i32__different_sgpr__fi_offset0() #0 { unreachable } + define void @s_add_i32__different_sgpr__fi_offset0_live_after() #0 { unreachable } + define void @s_add_i32__identity_sgpr__fi_offset0__kernel() #0 { unreachable } + define void @s_add_i32__fi_offset0__identity_sgpr__kernel() #0 { unreachable } + define void @s_add_i32__identity_sgpr__fi_offset32__kernel() #0 { unreachable } + define void @s_add_i32__fi_offset32__identity_sgpr__kernel() #0 { unreachable } + define void @s_add_i32__identity_sgpr__fi_offset0() #0 { unreachable } + define void @s_add_i32__fi_offset32__identity_sgpr() #0 { unreachable } + define void @s_add_i32_use_dst_reg_as_temp_regression() #0 { unreachable } + define void @s_add_i32_frame_index_elimination_no_sgpr_dead_scc_offset_zero() #0 { unreachable } + define void @s_add_i32_frame_index_elimination_no_sgpr_dead_scc_offset_non_zero() #0 { unreachable } + attributes #0 = { nounwind } +... +--- --- name: s_add_i32__inline_imm__fi_offset0 tracksRegLiveness: true @@ -445,8 +487,6 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__kernel__literal__fi_offset96__offset_literal ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_MOV_B32 164 @@ -455,23 +495,17 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__kernel__literal__fi_offset96__offset_literal ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_MOV_B32 164 ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7 ; ; FLATSCRW64-LABEL: name: s_add_i32__kernel__literal__fi_offset96__offset_literal - ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW64-NEXT: renamable $sgpr7 = S_MOV_B32 164 + ; FLATSCRW64: renamable $sgpr7 = S_MOV_B32 164 ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7 ; ; FLATSCRW32-LABEL: name: s_add_i32__kernel__literal__fi_offset96__offset_literal - ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW32-NEXT: renamable $sgpr7 = S_MOV_B32 164 + ; FLATSCRW32: renamable $sgpr7 = S_MOV_B32 164 ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7 renamable $sgpr7 = S_ADD_I32 68, %stack.1, implicit-def dead $scc SI_RETURN implicit $sgpr7 @@ -493,8 +527,6 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__kernel__literal__fi_offset96__offset_literal_live_scc ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 164, 0, implicit-def $scc @@ -503,23 +535,17 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__kernel__literal__fi_offset96__offset_literal_live_scc ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 164, 0, implicit-def $scc ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW64-LABEL: name: s_add_i32__kernel__literal__fi_offset96__offset_literal_live_scc - ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 164, 0, implicit-def $scc + ; FLATSCRW64: renamable $sgpr7 = S_ADD_I32 164, 0, implicit-def $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW32-LABEL: name: s_add_i32__kernel__literal__fi_offset96__offset_literal_live_scc - ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 164, 0, implicit-def $scc + ; FLATSCRW32: renamable $sgpr7 = S_ADD_I32 164, 0, implicit-def $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc renamable $sgpr7 = S_ADD_I32 68, %stack.1, implicit-def $scc SI_RETURN implicit $sgpr7, implicit $scc @@ -541,8 +567,6 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__kernel__fi_offset96__offset_literal__literal ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_MOV_B32 164 @@ -551,23 +575,17 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__kernel__fi_offset96__offset_literal__literal ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_MOV_B32 164 ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7 ; ; FLATSCRW64-LABEL: name: s_add_i32__kernel__fi_offset96__offset_literal__literal - ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW64-NEXT: renamable $sgpr7 = S_MOV_B32 164 + ; FLATSCRW64: renamable $sgpr7 = S_MOV_B32 164 ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7 ; ; FLATSCRW32-LABEL: name: s_add_i32__kernel__fi_offset96__offset_literal__literal - ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW32-NEXT: renamable $sgpr7 = S_MOV_B32 164 + ; FLATSCRW32: renamable $sgpr7 = S_MOV_B32 164 ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7 renamable $sgpr7 = S_ADD_I32 %stack.1, 68, implicit-def dead $scc SI_RETURN implicit $sgpr7 @@ -591,8 +609,6 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__kernel__sgpr__fi_literal_offset ; MUBUFW64: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 96, implicit-def dead $scc @@ -601,8 +617,6 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__kernel__sgpr__fi_literal_offset ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 96, implicit-def dead $scc @@ -611,16 +625,12 @@ body: | ; FLATSCRW64-LABEL: name: s_add_i32__kernel__sgpr__fi_literal_offset ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 96, implicit-def dead $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7 ; ; FLATSCRW32-LABEL: name: s_add_i32__kernel__sgpr__fi_literal_offset ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 96, implicit-def dead $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7 renamable $sgpr7 = S_ADD_I32 $sgpr8, %stack.1, implicit-def dead $scc @@ -645,8 +655,6 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__kernel__fi_literal_offset__sgpr ; MUBUFW64: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 96, $sgpr8, implicit-def dead $scc @@ -655,8 +663,6 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__kernel__fi_literal_offset__sgpr ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 96, $sgpr8, implicit-def dead $scc @@ -665,16 +671,12 @@ body: | ; FLATSCRW64-LABEL: name: s_add_i32__kernel__fi_literal_offset__sgpr ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 96, $sgpr8, implicit-def dead $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7 ; ; FLATSCRW32-LABEL: name: s_add_i32__kernel__fi_literal_offset__sgpr ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 96, $sgpr8, implicit-def dead $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7 renamable $sgpr7 = S_ADD_I32 %stack.1, $sgpr8, implicit-def dead $scc @@ -698,8 +700,6 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__kernel__sgpr__fi_offset0__live_scc ; MUBUFW64: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 0, implicit-def $scc @@ -708,8 +708,6 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__kernel__sgpr__fi_offset0__live_scc ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 0, implicit-def $scc @@ -718,16 +716,12 @@ body: | ; FLATSCRW64-LABEL: name: s_add_i32__kernel__sgpr__fi_offset0__live_scc ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 0, implicit-def $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW32-LABEL: name: s_add_i32__kernel__sgpr__fi_offset0__live_scc ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 0, implicit-def $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc renamable $sgpr7 = S_ADD_I32 $sgpr8, %stack.0, implicit-def $scc @@ -798,8 +792,6 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__kernel__sgpr__fi_literal_offset__live_scc ; MUBUFW64: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 96, implicit-def $scc @@ -808,8 +800,6 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__kernel__sgpr__fi_literal_offset__live_scc ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 96, implicit-def $scc @@ -818,16 +808,12 @@ body: | ; FLATSCRW64-LABEL: name: s_add_i32__kernel__sgpr__fi_literal_offset__live_scc ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 96, implicit-def $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW32-LABEL: name: s_add_i32__kernel__sgpr__fi_literal_offset__live_scc ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 96, implicit-def $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc renamable $sgpr7 = S_ADD_I32 $sgpr8, %stack.1, implicit-def $scc @@ -967,8 +953,6 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__kernel_inlineimm__fi_offset_32__total_offset_inlineimm ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 40, 0, implicit-def $scc @@ -977,23 +961,17 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__kernel_inlineimm__fi_offset_32__total_offset_inlineimm ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 40, 0, implicit-def $scc ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW64-LABEL: name: s_add_i32__kernel_inlineimm__fi_offset_32__total_offset_inlineimm - ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 40, 0, implicit-def $scc + ; FLATSCRW64: renamable $sgpr7 = S_ADD_I32 40, 0, implicit-def $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW32-LABEL: name: s_add_i32__kernel_inlineimm__fi_offset_32__total_offset_inlineimm - ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 40, 0, implicit-def $scc + ; FLATSCRW32: renamable $sgpr7 = S_ADD_I32 40, 0, implicit-def $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc renamable $sgpr7 = S_ADD_I32 8, %stack.1, implicit-def $scc SI_RETURN implicit $sgpr7, implicit $scc @@ -1016,8 +994,6 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__kernel_fi_offset_32__inlineimm__total_offset_inlineimm ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 0, 40, implicit-def $scc @@ -1026,23 +1002,17 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__kernel_fi_offset_32__inlineimm__total_offset_inlineimm ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 0, 40, implicit-def $scc ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW64-LABEL: name: s_add_i32__kernel_fi_offset_32__inlineimm__total_offset_inlineimm - ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 0, 40, implicit-def $scc + ; FLATSCRW64: renamable $sgpr7 = S_ADD_I32 0, 40, implicit-def $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW32-LABEL: name: s_add_i32__kernel_fi_offset_32__inlineimm__total_offset_inlineimm - ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 0, 40, implicit-def $scc + ; FLATSCRW32: renamable $sgpr7 = S_ADD_I32 0, 40, implicit-def $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc renamable $sgpr7 = S_ADD_I32 %stack.1, 8, implicit-def $scc SI_RETURN implicit $sgpr7, implicit $scc @@ -1270,8 +1240,6 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__identity_sgpr__fi_offset0__kernel ; MUBUFW64: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr8 = COPY $sgpr8 @@ -1280,8 +1248,6 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__identity_sgpr__fi_offset0__kernel ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr8 = COPY $sgpr8 @@ -1290,16 +1256,12 @@ body: | ; FLATSCRW64-LABEL: name: s_add_i32__identity_sgpr__fi_offset0__kernel ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $sgpr8 = COPY $sgpr8 ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr8 ; ; FLATSCRW32-LABEL: name: s_add_i32__identity_sgpr__fi_offset0__kernel ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $sgpr8 = COPY $sgpr8 ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr8 renamable $sgpr8 = S_ADD_I32 $sgpr8, %stack.0, implicit-def dead $scc @@ -1324,8 +1286,6 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__fi_offset0__identity_sgpr__kernel ; MUBUFW64: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr8 = COPY $sgpr8 @@ -1334,8 +1294,6 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__fi_offset0__identity_sgpr__kernel ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr8 = COPY $sgpr8 @@ -1344,16 +1302,12 @@ body: | ; FLATSCRW64-LABEL: name: s_add_i32__fi_offset0__identity_sgpr__kernel ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $sgpr8 = COPY $sgpr8 ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr8 ; ; FLATSCRW32-LABEL: name: s_add_i32__fi_offset0__identity_sgpr__kernel ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $sgpr8 = COPY $sgpr8 ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr8 renamable $sgpr8 = S_ADD_I32 $sgpr8, %stack.0, implicit-def dead $scc @@ -1379,8 +1333,6 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__identity_sgpr__fi_offset32__kernel ; MUBUFW64: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr8 = S_ADD_I32 $sgpr8, 32, implicit-def dead $scc @@ -1389,8 +1341,6 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__identity_sgpr__fi_offset32__kernel ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr8 = S_ADD_I32 $sgpr8, 32, implicit-def dead $scc @@ -1399,16 +1349,12 @@ body: | ; FLATSCRW64-LABEL: name: s_add_i32__identity_sgpr__fi_offset32__kernel ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $sgpr8 = S_ADD_I32 $sgpr8, 32, implicit-def dead $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr8 ; ; FLATSCRW32-LABEL: name: s_add_i32__identity_sgpr__fi_offset32__kernel ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $sgpr8 = S_ADD_I32 $sgpr8, 32, implicit-def dead $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr8 renamable $sgpr8 = S_ADD_I32 $sgpr8, %stack.1, implicit-def dead $scc @@ -1434,8 +1380,6 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__fi_offset32__identity_sgpr__kernel ; MUBUFW64: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr8 = S_ADD_I32 $sgpr8, 32, implicit-def dead $scc @@ -1444,8 +1388,6 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__fi_offset32__identity_sgpr__kernel ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr8 = S_ADD_I32 $sgpr8, 32, implicit-def dead $scc @@ -1454,16 +1396,12 @@ body: | ; FLATSCRW64-LABEL: name: s_add_i32__fi_offset32__identity_sgpr__kernel ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $sgpr8 = S_ADD_I32 $sgpr8, 32, implicit-def dead $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr8 ; ; FLATSCRW32-LABEL: name: s_add_i32__fi_offset32__identity_sgpr__kernel ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $sgpr8 = S_ADD_I32 $sgpr8, 32, implicit-def dead $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr8 renamable $sgpr8 = S_ADD_I32 $sgpr8, %stack.1, implicit-def dead $scc diff --git a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-u32.mir b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-u32.mir index 442018d21734a..716e99e977d32 100644 --- a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-u32.mir +++ b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-u32.mir @@ -9,6 +9,13 @@ # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=FLATSCRW32 %s # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=FLATSCRW32 %s +--- | + define void @s_add_u32__inline_imm__fi_offset0() #0 { unreachable } + define void @s_add_u32__kernel__literal__fi_offset96__offset_literal() #0 { unreachable } + define void @s_add_u32__kernel__literal__fi_offset96__offset_literal_live_scc() #0 { unreachable } + attributes #0 = { nounwind } +... +--- --- name: s_add_u32__inline_imm__fi_offset0 tracksRegLiveness: true @@ -58,8 +65,6 @@ body: | ; MUBUFW64-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_MOV_B32 164 @@ -68,23 +73,17 @@ body: | ; MUBUFW32-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_MOV_B32 164 ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7 ; ; FLATSCRW64-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal - ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW64-NEXT: renamable $sgpr7 = S_MOV_B32 164 + ; FLATSCRW64: renamable $sgpr7 = S_MOV_B32 164 ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7 ; ; FLATSCRW32-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal - ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW32-NEXT: renamable $sgpr7 = S_MOV_B32 164 + ; FLATSCRW32: renamable $sgpr7 = S_MOV_B32 164 ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7 renamable $sgpr7 = S_ADD_U32 68, %stack.1, implicit-def dead $scc SI_RETURN implicit $sgpr7 @@ -106,8 +105,6 @@ body: | ; MUBUFW64-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal_live_scc ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_U32 164, 0, implicit-def $scc @@ -116,23 +113,17 @@ body: | ; MUBUFW32-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal_live_scc ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_U32 164, 0, implicit-def $scc ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW64-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal_live_scc - ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_U32 164, 0, implicit-def $scc + ; FLATSCRW64: renamable $sgpr7 = S_ADD_U32 164, 0, implicit-def $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW32-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal_live_scc - ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_U32 164, 0, implicit-def $scc + ; FLATSCRW32: renamable $sgpr7 = S_ADD_U32 164, 0, implicit-def $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc renamable $sgpr7 = S_ADD_U32 68, %stack.1, implicit-def $scc SI_RETURN implicit $sgpr7, implicit $scc diff --git a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32-wave32.mir b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32-wave32.mir index 2a4b305f32cef..5e1f153486549 100644 --- a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32-wave32.mir +++ b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32-wave32.mir @@ -4,6 +4,26 @@ # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=+wavefrontsize32 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefixes=FLATSCRW32 %s +--- | + define void @v_add_co_u32_e64__inline_imm__fi_offset0() #0 { unreachable } + define void @v_add_co_u32_e64__inline_imm__fi_offset0__live_vcc() #0 { unreachable } + define void @v_add_co_u32_e64__inline_imm__fi_offset0__clamp() #0 { unreachable } + define void @v_add_co_u32_e64__inline_imm__fi_offset0__live_vcc_clamp() #0 { unreachable } + define void @v_add_co_u32_e64__fi_literal_offset__sgpr() #0 { unreachable } + define void @v_add_co_u32_e64__fi_literal_offset__sgpr_clamp() #0 { unreachable } + define void @v_add_co_u32_e64__fi_literal_offset__vgpr() #0 { unreachable } + define void @v_add_co_u32_e64__fi_literal_offset__vgpr__clamp() #0 { unreachable } + define void @v_add_co_u32_e64__fi_literal_offset__vgpr__live_vcc() #0 { unreachable } + define void @v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp() #0 { unreachable } + define void @v_add_co_u32_e64__fi_literal_offset__sgpr__scavenge_spill_required() #0 { unreachable } + define void @v_add_co_u32_e64__kernel_fi_offset0__other_vgpr_live_after() #0 { unreachable } + define void @v_add_co_u32_e64__kernel__other_vgpr_live_after__fi_offset0() #0 { unreachable } + define void @v_add_co_u32_e64__identity_vgpr__fi_offset0__kernel() #0 { unreachable } + define void @v_add_co_u32_e64__fi_offset0__identity_vgpr__kernel() #0 { unreachable } + define void @v_add_co_u32_e64__identity_vgpr__fi_offset32__kernel() #0 { unreachable } + attributes #0 = { nounwind } +... +--- --- name: v_add_co_u32_e64__inline_imm__fi_offset0 tracksRegLiveness: true @@ -274,15 +294,11 @@ machineFunctionInfo: body: | bb.0: ; MUBUFW32-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp - ; MUBUFW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; MUBUFW32-NEXT: renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 84, 0, 1, implicit $exec + ; MUBUFW32: renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 84, 0, 1, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp - ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW32-NEXT: renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 84, 0, 1, implicit $exec + ; FLATSCRW32: renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 84, 0, 1, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 12, %stack.1, 1, implicit $exec SI_RETURN implicit $vgpr0 @@ -341,16 +357,12 @@ body: | ; MUBUFW32-LABEL: name: v_add_co_u32_e64__kernel_fi_offset0__other_vgpr_live_after ; MUBUFW32: liveins: $vgpr1 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: renamable $vgpr0, renamable $sgpr8 = V_ADD_CO_U32_e64 $vgpr1, 0, 0, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 ; ; FLATSCRW32-LABEL: name: v_add_co_u32_e64__kernel_fi_offset0__other_vgpr_live_after ; FLATSCRW32: liveins: $vgpr1 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0, renamable $sgpr8 = V_ADD_CO_U32_e64 $vgpr1, 0, 0, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 renamable $vgpr0, renamable $sgpr8 = V_ADD_CO_U32_e64 renamable $vgpr1, %stack.0, 0, implicit $exec @@ -374,16 +386,12 @@ body: | ; MUBUFW32-LABEL: name: v_add_co_u32_e64__kernel__other_vgpr_live_after__fi_offset0 ; MUBUFW32: liveins: $vgpr1 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: renamable $vgpr0, renamable $sgpr8 = V_ADD_CO_U32_e64 0, $vgpr1, 0, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 ; ; FLATSCRW32-LABEL: name: v_add_co_u32_e64__kernel__other_vgpr_live_after__fi_offset0 ; FLATSCRW32: liveins: $vgpr1 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0, renamable $sgpr8 = V_ADD_CO_U32_e64 0, $vgpr1, 0, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 renamable $vgpr0, renamable $sgpr8 = V_ADD_CO_U32_e64 %stack.0, renamable $vgpr1, 0, implicit $exec @@ -408,15 +416,11 @@ body: | ; MUBUFW32-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset0__kernel ; MUBUFW32: liveins: $vgpr0 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset0__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, renamable dead $vcc_lo = V_ADD_CO_U32_e64 $vgpr0, %stack.0, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -440,15 +444,11 @@ body: | ; MUBUFW32-LABEL: name: v_add_co_u32_e64__fi_offset0__identity_vgpr__kernel ; MUBUFW32: liveins: $vgpr0 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_co_u32_e64__fi_offset0__identity_vgpr__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, renamable dead $vcc_lo = V_ADD_CO_U32_e64 %stack.0, $vgpr0, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -473,16 +473,12 @@ body: | ; MUBUFW32-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset32__kernel ; MUBUFW32: liveins: $vgpr0 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: renamable $vgpr0, dead renamable $vcc_lo = V_ADD_CO_U32_e64 $vgpr0, 32, 0, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset32__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0, dead renamable $vcc_lo = V_ADD_CO_U32_e64 $vgpr0, 32, 0, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, renamable dead $vcc_lo = V_ADD_CO_U32_e64 $vgpr0, %stack.1, 0, implicit $exec diff --git a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir index ae53a3696fc2b..7867e09efc3ef 100644 --- a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir +++ b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir @@ -10,6 +10,63 @@ # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+wavefrontsize64 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefixes=FLATSCRW64,GFX11 %s # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=+wavefrontsize64 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefixes=FLATSCRW64,GFX12 %s +--- | + define void @v_add_co_u32_e32__inline_imm__fi_offset0() #0 { unreachable } + define void @v_add_co_u32_e32__inline_imm__fi_offset0_live_vcc() #0 { unreachable } + define void @v_add_co_u32_e32__inline_imm___fi_offset_inline_imm() #0 { unreachable } + define void @v_add_co_u32_e32__inline_imm___fi_offset_inline_imm_live_vcc() #0 { unreachable } + define void @v_add_co_u32_e32__literal__fi_offset0() #0 { unreachable } + define void @v_add_co_u32_e32__literal__fi_offset0_live_vcc() #0 { unreachable } + define void @v_add_co_u32_e32__literal__fi_offset0__offset_inlineimm() #0 { unreachable } + define void @v_add_co_u32_e32__literal__fi_offset0__offset_inlineimm_live_vcc() #0 { unreachable } + define void @v_add_co_u32_e32__vgpr__fi_offset0() #0 { unreachable } + define void @v_add_co_u32_e32__fi_offset0__vgpr() #0 { unreachable } + define void @v_add_co_u32_e32__vgpr__fi_literal_offset() #0 { unreachable } + define void @v_add_co_u32_e32__fi_literal_offset__vgpr() #0 { unreachable } + define void @v_add_co_u32_e32__sgpr__fi_literal_offset() #0 { unreachable } + define void @v_add_co_u32_e64__inline_imm__fi_offset0() #0 { unreachable } + define void @v_add_co_u32_e64__inline_imm__fi_offset0__clamp() #0 { unreachable } + define void @v_add_co_u32_e64__inline_imm__fi_offset0__live_vcc_clamp() #0 { unreachable } + define void @v_add_co_u32_e64__fi_literal_offset__sgpr() #0 { unreachable } + define void @v_add_co_u32_e64__fi_literal_offset__sgpr_clamp() #0 { unreachable } + define void @v_add_co_u32_e64__fi_literal_offset__vgpr() #0 { unreachable } + define void @v_add_co_u32_e64__fi_literal_offset__vgpr__clamp() #0 { unreachable } + define void @v_add_co_u32_e64__fi_literal_offset__vgpr__live_vcc() #0 { unreachable } + define void @v_add_co_u32_e32__inline_imm__fi_offset0__kernel() #0 { unreachable } + define void @v_add_co_u32_e32__inline_imm__fi_offset0__kernel__live_vcc() #0 { unreachable } + define void @v_add_co_u32_e32__inline_imm__fi_offset_literal__kernel() #0 { unreachable } + define void @v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp() #0 { unreachable } + define void @v_add_co_u32_e64__fi_literal_offset__sgpr__scavenge_spill_required() #0 { unreachable } + define void @v_add_co_u32_e32__fi_literal_offset__sgpr__scavenge_spill_required() #0 { unreachable } + define void @v_add_co_u32_e32__fi_literal_offset__vgpr__scavenge_spill_required() #0 { unreachable } + define void @v_add_co_u32_e32__kernel_fi_offset0__other_vgpr_live_after() #0 { unreachable } + define void @v_add_co_u32_e64__kernel_fi_offset0__other_vgpr_live_after() #0 { unreachable } + define void @v_add_co_u32_e64__kernel__other_vgpr_live_after__fi_offset0() #0 { unreachable } + define void @v_add_co_u32_e32__identity_vgpr__fi_offset0__kernel() #0 { unreachable } + define void @v_add_co_u32_e32__fi_offset0__identity_vgpr__kernel() #0 { unreachable } + define void @v_add_co_u32_e64__identity_vgpr__fi_offset0__kernel() #0 { unreachable } + define void @v_add_co_u32_e64__fi_offset0__identity_vgpr__kernel() #0 { unreachable } + define void @v_add_co_u32_e32__fi_offset0__identity_vgpr__kernel_kill() #0 { unreachable } + define void @v_add_co_u32_e32__fi_offset0__identity_vgpr__kernel_live_vcc() #0 { unreachable } + define void @v_add_co_u32_e32__identity_vgpr__fi_offset32__kernel() #0 { unreachable } + define void @v_add_co_u32_e32__identity_vgpr__fi_offset72__kernel() #0 { unreachable } + define void @v_add_co_u32_e32__fi_offset72__identity_vgpr__kernel() #0 { unreachable } + define void @v_add_co_u32_e32__fi_offset32__identity_vgpr__kernel() #0 { unreachable } + define void @v_add_co_u32_e64__identity_vgpr__fi_offset32__kernel() #0 { unreachable } + define void @v_add_co_u32_e64__fi_sgpr_kernel() #0 { unreachable } + define void @v_add_co_u32_e64__fi_sgpr_func() #0 { unreachable } + define void @v_add_co_u32_e64__fi_inc_same_vgpr_kernel() #0 { unreachable } + define void @v_add_co_u32_e64__fi_inc_same_vgpr_func() #0 { unreachable } + define void @v_add_co_u32_e64__fi_sgpr_kernel_live_co() #0 { unreachable } + define void @v_add_co_u32_e64_fi_sgpr_clobbered_register() #0 { unreachable } + define void @v_add_co_u32_e64_sgpr_fi_clobbered_register() #0 { unreachable } + define void @v_add_co_u32_e64_imm_fi_vop3_literal_error_non_vcc() #0 { unreachable } + define void @v_add_co_u32_e64_imm_fi_vop3_literal_error_non_vcc_live() #0 { unreachable } + define void @v_add_co_u32_e64_imm_fi_vop3_literal_error_vcc() #0 { unreachable } + define void @v_add_co_u32_e64_imm_fi_vop3_literal_error_vcc_live() #0 { unreachable } + attributes #0 = { nounwind } +... +--- --- name: v_add_co_u32_e32__inline_imm__fi_offset0 tracksRegLiveness: true @@ -890,17 +947,13 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__inline_imm__fi_offset0__kernel ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec ; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__inline_imm__fi_offset0__kernel - ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec + ; FLATSCRW64: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_CO_U32_e32 12, %stack.0, implicit-def dead $vcc, implicit $exec SI_RETURN implicit $vgpr0 @@ -922,8 +975,6 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__inline_imm__fi_offset0__kernel__live_vcc ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $vgpr1 = V_MOV_B32_e32 0, implicit $exec @@ -931,9 +982,7 @@ body: | ; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc ; ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__inline_imm__fi_offset0__kernel__live_vcc - ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 0, implicit $exec + ; FLATSCRW64: $vgpr1 = V_MOV_B32_e32 0, implicit $exec ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 12, killed $vgpr1, implicit-def $vcc, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc renamable $vgpr0 = V_ADD_CO_U32_e32 12, %stack.0, implicit-def $vcc, implicit $exec @@ -957,17 +1006,13 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__inline_imm__fi_offset_literal__kernel ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 84, implicit $exec ; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__inline_imm__fi_offset_literal__kernel - ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 84, implicit $exec + ; FLATSCRW64: renamable $vgpr0 = V_MOV_B32_e32 84, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_CO_U32_e32 12, %stack.1, implicit-def dead $vcc, implicit $exec SI_RETURN implicit $vgpr0 @@ -990,8 +1035,6 @@ body: | ; GFX7-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp ; GFX7: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX7-NEXT: {{ $}} - ; GFX7-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX7-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX7-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX7-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX7-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec @@ -1001,8 +1044,6 @@ body: | ; GFX8-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp ; GFX8: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX8-NEXT: {{ $}} - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX8-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX8-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec @@ -1012,8 +1053,6 @@ body: | ; GFX900-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp ; GFX900: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX900-NEXT: {{ $}} - ; GFX900-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX900-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX900-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX900-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec @@ -1023,8 +1062,6 @@ body: | ; GFX90A-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp ; GFX90A: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A-NEXT: {{ $}} - ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX90A-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec @@ -1034,30 +1071,22 @@ body: | ; GFX10-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp ; GFX10: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX10-NEXT: {{ $}} - ; GFX10-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX10-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX10-NEXT: renamable $vgpr0, dead $vcc = V_ADD_CO_U32_e64 84, 0, 1, implicit $exec ; GFX10-NEXT: SI_RETURN implicit $vgpr0 ; ; GFX942-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp - ; GFX942: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; GFX942-NEXT: $sgpr4 = S_MOV_B32 72 + ; GFX942: $sgpr4 = S_MOV_B32 72 ; GFX942-NEXT: renamable $vgpr0, dead $vcc = V_ADD_CO_U32_e64 12, killed $sgpr4, 1, implicit $exec ; GFX942-NEXT: SI_RETURN implicit $vgpr0 ; ; GFX11-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp - ; GFX11: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; GFX11-NEXT: renamable $vgpr0, dead $vcc = V_ADD_CO_U32_e64 84, 0, 1, implicit $exec + ; GFX11: renamable $vgpr0, dead $vcc = V_ADD_CO_U32_e64 84, 0, 1, implicit $exec ; GFX11-NEXT: SI_RETURN implicit $vgpr0 ; ; GFX12-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp - ; GFX12: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX12-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; GFX12-NEXT: renamable $vgpr0, dead $vcc = V_ADD_CO_U32_e64 84, 0, 1, implicit $exec + ; GFX12: renamable $vgpr0, dead $vcc = V_ADD_CO_U32_e64 84, 0, 1, implicit $exec ; GFX12-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, dead $vcc = V_ADD_CO_U32_e64 12, %stack.1, 1, implicit $exec SI_RETURN implicit $vgpr0 @@ -1268,8 +1297,6 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__kernel_fi_offset0__other_vgpr_live_after ; MUBUFW64: liveins: $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec @@ -1278,8 +1305,6 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__kernel_fi_offset0__other_vgpr_live_after ; FLATSCRW64: liveins: $vgpr1 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 renamable $vgpr0 = V_ADD_CO_U32_e32 renamable $vgpr1, %stack.0, implicit-def dead $vcc, implicit $exec @@ -1303,8 +1328,6 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e64__kernel_fi_offset0__other_vgpr_live_after ; MUBUFW64: liveins: $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 $vgpr1, 0, 0, implicit $exec @@ -1313,8 +1336,6 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e64__kernel_fi_offset0__other_vgpr_live_after ; FLATSCRW64: liveins: $vgpr1 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 $vgpr1, 0, 0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 renamable $vgpr1, %stack.0, 0, implicit $exec @@ -1338,8 +1359,6 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e64__kernel__other_vgpr_live_after__fi_offset0 ; MUBUFW64: liveins: $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 0, $vgpr1, 0, implicit $exec @@ -1348,8 +1367,6 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e64__kernel__other_vgpr_live_after__fi_offset0 ; FLATSCRW64: liveins: $vgpr1 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 0, $vgpr1, 0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 %stack.0, renamable $vgpr1, 0, implicit $exec @@ -1374,8 +1391,6 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__identity_vgpr__fi_offset0__kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0 @@ -1383,8 +1398,6 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__identity_vgpr__fi_offset0__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_CO_U32_e32 $vgpr0, %stack.0, implicit-def dead $vcc, implicit $exec SI_RETURN implicit $vgpr0 @@ -1407,8 +1420,6 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__fi_offset0__identity_vgpr__kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0 @@ -1416,8 +1427,6 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__fi_offset0__identity_vgpr__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_CO_U32_e32 %stack.0, $vgpr0, implicit-def dead $vcc, implicit $exec SI_RETURN implicit $vgpr0 @@ -1441,8 +1450,6 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset0__kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0 @@ -1450,8 +1457,6 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset0__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, renamable dead $vcc = V_ADD_CO_U32_e64 $vgpr0, %stack.0, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -1475,8 +1480,6 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e64__fi_offset0__identity_vgpr__kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0 @@ -1484,8 +1487,6 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e64__fi_offset0__identity_vgpr__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, renamable dead $vcc = V_ADD_CO_U32_e64 %stack.0, $vgpr0, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -1508,8 +1509,6 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__fi_offset0__identity_vgpr__kernel_kill ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0 @@ -1517,8 +1516,6 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__fi_offset0__identity_vgpr__kernel_kill ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_CO_U32_e32 %stack.0, killed $vgpr0, implicit-def dead $vcc, implicit $exec SI_RETURN implicit $vgpr0 @@ -1541,8 +1538,6 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__fi_offset0__identity_vgpr__kernel_live_vcc ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 0, $vgpr0, implicit-def $vcc, implicit $exec @@ -1551,8 +1546,6 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__fi_offset0__identity_vgpr__kernel_live_vcc ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 0, $vgpr0, implicit-def $vcc, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc renamable $vgpr0 = V_ADD_CO_U32_e32 %stack.0, $vgpr0, implicit-def $vcc, implicit $exec @@ -1578,8 +1571,6 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__identity_vgpr__fi_offset32__kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 32, $vgpr0, implicit-def dead $vcc, implicit $exec @@ -1588,8 +1579,6 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__identity_vgpr__fi_offset32__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 32, $vgpr0, implicit-def dead $vcc, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_CO_U32_e32 $vgpr0, %stack.1, implicit-def dead $vcc, implicit $exec @@ -1616,8 +1605,6 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__identity_vgpr__fi_offset72__kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 72, $vgpr0, implicit-def dead $vcc, implicit $exec @@ -1626,8 +1613,6 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__identity_vgpr__fi_offset72__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 72, $vgpr0, implicit-def dead $vcc, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_CO_U32_e32 $vgpr0, %stack.1, implicit-def dead $vcc, implicit $exec @@ -1653,8 +1638,6 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__fi_offset72__identity_vgpr__kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 72, $vgpr0, implicit-def dead $vcc, implicit $exec @@ -1663,8 +1646,6 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__fi_offset72__identity_vgpr__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 72, $vgpr0, implicit-def dead $vcc, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_CO_U32_e32 %stack.1, $vgpr0, implicit-def dead $vcc, implicit $exec @@ -1690,8 +1671,6 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__fi_offset32__identity_vgpr__kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 32, $vgpr0, implicit-def dead $vcc, implicit $exec @@ -1700,8 +1679,6 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__fi_offset32__identity_vgpr__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 32, $vgpr0, implicit-def dead $vcc, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_CO_U32_e32 %stack.1, $vgpr0, implicit-def dead $vcc, implicit $exec @@ -1727,8 +1704,6 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset32__kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 $vgpr0, 32, 0, implicit $exec @@ -1737,8 +1712,6 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset32__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 $vgpr0, 32, 0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, renamable dead $vcc = V_ADD_CO_U32_e64 $vgpr0, %stack.1, 0, implicit $exec @@ -1763,8 +1736,6 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e64__fi_sgpr_kernel ; MUBUFW64: liveins: $sgpr4, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 killed $sgpr4, implicit $exec @@ -1773,8 +1744,6 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e64__fi_sgpr_kernel ; FLATSCRW64: liveins: $sgpr4 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 killed $sgpr4, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, dead renamable $sgpr4_sgpr5 = V_ADD_CO_U32_e64 %stack.0, killed $sgpr4, 0, implicit $exec @@ -1842,8 +1811,6 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e64__fi_inc_same_vgpr_kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0 @@ -1851,8 +1818,6 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e64__fi_inc_same_vgpr_kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, dead renamable $sgpr4_sgpr5 = V_ADD_CO_U32_e64 %stack.0, killed $vgpr0, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -1906,8 +1871,6 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e64__fi_sgpr_kernel_live_co ; MUBUFW64: liveins: $sgpr4, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0, renamable $sgpr4_sgpr5 = V_ADD_CO_U32_e64 0, killed $sgpr4, 0, implicit $exec @@ -1916,8 +1879,6 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e64__fi_sgpr_kernel_live_co ; FLATSCRW64: liveins: $sgpr4 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0, renamable $sgpr4_sgpr5 = V_ADD_CO_U32_e64 0, killed $sgpr4, 0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr4_sgpr5 renamable $vgpr0, renamable $sgpr4_sgpr5 = V_ADD_CO_U32_e64 %stack.0, killed $sgpr4, 0, implicit $exec @@ -1942,8 +1903,6 @@ body: | ; GFX7-LABEL: name: v_add_co_u32_e64_fi_sgpr_clobbered_register ; GFX7: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX7-NEXT: {{ $}} - ; GFX7-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX7-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX7-NEXT: $sgpr8_sgpr9_sgpr10_sgpr11 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX7-NEXT: $sgpr8 = S_ADD_U32 $sgpr8, $noreg, implicit-def $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX7-NEXT: $sgpr9 = S_ADDC_U32 $sgpr9, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 @@ -1956,8 +1915,6 @@ body: | ; GFX8-LABEL: name: v_add_co_u32_e64_fi_sgpr_clobbered_register ; GFX8: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX8-NEXT: {{ $}} - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: $sgpr8_sgpr9_sgpr10_sgpr11 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX8-NEXT: $sgpr8 = S_ADD_U32 $sgpr8, $noreg, implicit-def $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX8-NEXT: $sgpr9 = S_ADDC_U32 $sgpr9, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 @@ -1970,8 +1927,6 @@ body: | ; GFX900-LABEL: name: v_add_co_u32_e64_fi_sgpr_clobbered_register ; GFX900: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX900-NEXT: {{ $}} - ; GFX900-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX900-NEXT: $sgpr8_sgpr9_sgpr10_sgpr11 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX900-NEXT: $sgpr8 = S_ADD_U32 $sgpr8, $noreg, implicit-def $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX900-NEXT: $sgpr9 = S_ADDC_U32 $sgpr9, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 @@ -1984,8 +1939,6 @@ body: | ; GFX90A-LABEL: name: v_add_co_u32_e64_fi_sgpr_clobbered_register ; GFX90A: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A-NEXT: {{ $}} - ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX90A-NEXT: $sgpr8_sgpr9_sgpr10_sgpr11 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A-NEXT: $sgpr8 = S_ADD_U32 $sgpr8, $noreg, implicit-def $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX90A-NEXT: $sgpr9 = S_ADDC_U32 $sgpr9, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 @@ -1998,8 +1951,6 @@ body: | ; GFX10-LABEL: name: v_add_co_u32_e64_fi_sgpr_clobbered_register ; GFX10: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX10-NEXT: {{ $}} - ; GFX10-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10-NEXT: $sgpr96_sgpr97_sgpr98_sgpr99 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX10-NEXT: $sgpr96 = S_ADD_U32 $sgpr96, $noreg, implicit-def $scc, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99 ; GFX10-NEXT: $sgpr97 = S_ADDC_U32 $sgpr97, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99 @@ -2011,8 +1962,6 @@ body: | ; GFX942-LABEL: name: v_add_co_u32_e64_fi_sgpr_clobbered_register ; GFX942: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C ; GFX942-NEXT: {{ $}} - ; GFX942-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX942-NEXT: renamable $sgpr0 = S_LSHL_B32 renamable $sgpr6, 2, implicit-def dead $scc ; GFX942-NEXT: $vgpr1 = V_MOV_B32_e32 32772, implicit $exec ; GFX942-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 killed $vgpr1, killed $sgpr0, 0, implicit $exec @@ -2022,8 +1971,6 @@ body: | ; GFX11-LABEL: name: v_add_co_u32_e64_fi_sgpr_clobbered_register ; GFX11: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C ; GFX11-NEXT: {{ $}} - ; GFX11-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11-NEXT: renamable $sgpr0 = S_LSHL_B32 renamable $sgpr6, 2, implicit-def dead $scc ; GFX11-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 32772, killed $sgpr0, 0, implicit $exec ; GFX11-NEXT: renamable $vgpr0 = BUFFER_LOAD_DWORD_OFFEN killed renamable $vgpr0, $sgpr96_sgpr97_sgpr98_sgpr99, 0, 0, 0, 0, implicit $exec :: (load (s32), addrspace 5) @@ -2032,8 +1979,6 @@ body: | ; GFX12-LABEL: name: v_add_co_u32_e64_fi_sgpr_clobbered_register ; GFX12: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C ; GFX12-NEXT: {{ $}} - ; GFX12-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX12-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX12-NEXT: renamable $sgpr0 = S_LSHL_B32 renamable $sgpr6, 2, implicit-def dead $scc ; GFX12-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 32768, killed $sgpr0, 0, implicit $exec ; GFX12-NEXT: renamable $vgpr0 = BUFFER_LOAD_DWORD_OFFEN killed renamable $vgpr0, $sgpr96_sgpr97_sgpr98_sgpr99, 0, 0, 0, 0, implicit $exec :: (load (s32), addrspace 5) @@ -2062,8 +2007,6 @@ body: | ; GFX7-LABEL: name: v_add_co_u32_e64_sgpr_fi_clobbered_register ; GFX7: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX7-NEXT: {{ $}} - ; GFX7-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX7-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX7-NEXT: $sgpr8_sgpr9_sgpr10_sgpr11 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX7-NEXT: $sgpr8 = S_ADD_U32 $sgpr8, $noreg, implicit-def $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX7-NEXT: $sgpr9 = S_ADDC_U32 $sgpr9, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 @@ -2076,8 +2019,6 @@ body: | ; GFX8-LABEL: name: v_add_co_u32_e64_sgpr_fi_clobbered_register ; GFX8: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX8-NEXT: {{ $}} - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: $sgpr8_sgpr9_sgpr10_sgpr11 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX8-NEXT: $sgpr8 = S_ADD_U32 $sgpr8, $noreg, implicit-def $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX8-NEXT: $sgpr9 = S_ADDC_U32 $sgpr9, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 @@ -2090,8 +2031,6 @@ body: | ; GFX900-LABEL: name: v_add_co_u32_e64_sgpr_fi_clobbered_register ; GFX900: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX900-NEXT: {{ $}} - ; GFX900-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX900-NEXT: $sgpr8_sgpr9_sgpr10_sgpr11 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX900-NEXT: $sgpr8 = S_ADD_U32 $sgpr8, $noreg, implicit-def $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX900-NEXT: $sgpr9 = S_ADDC_U32 $sgpr9, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 @@ -2104,8 +2043,6 @@ body: | ; GFX90A-LABEL: name: v_add_co_u32_e64_sgpr_fi_clobbered_register ; GFX90A: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A-NEXT: {{ $}} - ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX90A-NEXT: $sgpr8_sgpr9_sgpr10_sgpr11 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A-NEXT: $sgpr8 = S_ADD_U32 $sgpr8, $noreg, implicit-def $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX90A-NEXT: $sgpr9 = S_ADDC_U32 $sgpr9, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 @@ -2118,8 +2055,6 @@ body: | ; GFX10-LABEL: name: v_add_co_u32_e64_sgpr_fi_clobbered_register ; GFX10: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX10-NEXT: {{ $}} - ; GFX10-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10-NEXT: $sgpr96_sgpr97_sgpr98_sgpr99 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX10-NEXT: $sgpr96 = S_ADD_U32 $sgpr96, $noreg, implicit-def $scc, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99 ; GFX10-NEXT: $sgpr97 = S_ADDC_U32 $sgpr97, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99 @@ -2131,8 +2066,6 @@ body: | ; GFX942-LABEL: name: v_add_co_u32_e64_sgpr_fi_clobbered_register ; GFX942: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C ; GFX942-NEXT: {{ $}} - ; GFX942-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX942-NEXT: renamable $sgpr0 = S_LSHL_B32 renamable $sgpr6, 2, implicit-def dead $scc ; GFX942-NEXT: $vgpr1 = V_MOV_B32_e32 32772, implicit $exec ; GFX942-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 killed $vgpr1, killed $sgpr0, 0, implicit $exec @@ -2142,8 +2075,6 @@ body: | ; GFX11-LABEL: name: v_add_co_u32_e64_sgpr_fi_clobbered_register ; GFX11: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C ; GFX11-NEXT: {{ $}} - ; GFX11-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11-NEXT: renamable $sgpr0 = S_LSHL_B32 renamable $sgpr6, 2, implicit-def dead $scc ; GFX11-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 32772, killed $sgpr0, 0, implicit $exec ; GFX11-NEXT: renamable $vgpr0 = BUFFER_LOAD_DWORD_OFFEN killed renamable $vgpr0, $sgpr96_sgpr97_sgpr98_sgpr99, 0, 0, 0, 0, implicit $exec :: (load (s32), addrspace 5) @@ -2152,8 +2083,6 @@ body: | ; GFX12-LABEL: name: v_add_co_u32_e64_sgpr_fi_clobbered_register ; GFX12: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C ; GFX12-NEXT: {{ $}} - ; GFX12-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX12-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX12-NEXT: renamable $sgpr0 = S_LSHL_B32 renamable $sgpr6, 2, implicit-def dead $scc ; GFX12-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 32768, killed $sgpr0, 0, implicit $exec ; GFX12-NEXT: renamable $vgpr0 = BUFFER_LOAD_DWORD_OFFEN killed renamable $vgpr0, $sgpr96_sgpr97_sgpr98_sgpr99, 0, 0, 0, 0, implicit $exec :: (load (s32), addrspace 5) diff --git a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir index c5c9696ee355a..b1ebb298ac5c7 100644 --- a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir +++ b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir @@ -6,6 +6,49 @@ # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=FLATSCRW32 %s # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=FLATSCRW32 %s +--- | + define void @v_add_u32_e32__inline_imm__fi_offset0() #0 { unreachable } + define void @v_add_u32_e32__inline_imm___fi_offset_inline_imm() #0 { unreachable } + define void @v_add_u32_e32__literal__fi_offset0() #0 { unreachable } + define void @v_add_u32_e32__literal__fi_offset0__offset_inlineimm() #0 { unreachable } + define void @v_add_u32_e32__vgpr__fi_offset0() #0 { unreachable } + define void @v_add_u32_e32__fi_offset0__vgpr() #0 { unreachable } + define void @v_add_u32_e32__vgpr__fi_literal_offset() #0 { unreachable } + define void @v_add_u32_e32__fi_literal_offset__vgpr() #0 { unreachable } + define void @v_add_u32_e32__sgpr__fi_literal_offset() #0 { unreachable } + define void @v_add_u32_e64__inline_imm__fi_offset0() #0 { unreachable } + define void @v_add_u32_e64__fi_literal_offset__sgpr() #0 { unreachable } + define void @v_add_u32_e64__vgpr__fi_literal_offset() #0 { unreachable } + define void @v_add_u32_e64__vgpr__fi_literal_offset__clamp() #0 { unreachable } + define void @v_add_u32_e64__fi_literal_offset__vgpr__clamp() #0 { unreachable } + define void @v_add_u32_e64__fi_literal_offset__vgpr__clamp__kernel() #0 { unreachable } + define void @v_add_u32_e32__inline_imm__fi_offset0__kernel() #0 { unreachable } + define void @v_add_u32_e64__inline_imm__fi_offset0__kernel() #0 { unreachable } + define void @v_add_u32_e32__inline_imm__fi_literal__kernel() #0 { unreachable } + define void @v_add_u32_e64__inline_imm__fi_literal__kernel() #0 { unreachable } + define void @v_add_u32_e64__fi_literal__inline_imm__kernel() #0 { unreachable } + define void @v_add_u32_e64__inline_imm__fi_literal__kernel__clamp() #0 { unreachable } + define void @killed_reg_regression() #0 { unreachable } + define void @v_add_u32_e32__kernel_fi_offset0__other_vgpr_live_after() #0 { unreachable } + define void @v_add_u32_e32__kernel_other_vgpr_live_after__fi_offset0() #0 { unreachable } + define void @v_add_u32_e32__kernel_fi_offset0__sgpr_live_after() #0 { unreachable } + define void @v_add_u32_e64__kernel_fi_offset0__other_vgpr_live_after() #0 { unreachable } + define void @v_add_u32_e32__kernel_fi_offset72__sgpr_live_after() #0 { unreachable } + define void @v_add_u32_e64__kernel_fi_offset72__sgpr_live_after() #0 { unreachable } + define void @v_add_u32_e32__identity_vgpr__fi_offset0__kernel() #0 { unreachable } + define void @v_add_u32_e32__fi_offset0__identity_vgpr__kernel() #0 { unreachable } + define void @v_add_u32_e64__identity_vgpr__fi_offset0__kernel() #0 { unreachable } + define void @v_add_u32_e64__fi_offset0__identity_vgpr__kernel() #0 { unreachable } + define void @v_add_u32_e32__fi_offset0__identity_vgpr__kernel_kill() #0 { unreachable } + define void @v_add_u32_e32__identity_vgpr__fi_offset32__kernel() #0 { unreachable } + define void @v_add_u32_e32__identity_vgpr__fi_offset72__kernel() #0 { unreachable } + define void @v_add_u32_e32__fi_offset72__identity_vgpr__kernel() #0 { unreachable } + define void @v_add_u32_e32__fi_offset32__identity_vgpr__kernel() #0 { unreachable } + define void @v_add_u32_e64__identity_vgpr__fi_offset32__kernel() #0 { unreachable } + define void @v_add_u32_e64_imm_fi_vop3_literal_error() #0 { unreachable } + attributes #0 = { nounwind } +... +--- --- name: v_add_u32_e32__inline_imm__fi_offset0 tracksRegLiveness: true @@ -622,8 +665,6 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__fi_literal_offset__vgpr__clamp__kernel ; MUBUF: liveins: $vgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec @@ -633,8 +674,6 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__fi_literal_offset__vgpr__clamp__kernel ; MUBUFW32: liveins: $vgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 128, $vgpr8, 1, implicit $exec @@ -643,8 +682,6 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e64__fi_literal_offset__vgpr__clamp__kernel ; FLATSCRW64: liveins: $vgpr8 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e64 killed $vgpr1, $vgpr8, 1, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 @@ -652,8 +689,6 @@ body: | ; FLATSCRW32-LABEL: name: v_add_u32_e64__fi_literal_offset__vgpr__clamp__kernel ; FLATSCRW32: liveins: $vgpr8 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 128, $vgpr8, 1, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e64 %stack.1, $vgpr8, 1, implicit $exec @@ -676,8 +711,6 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__inline_imm__fi_offset0__kernel ; MUBUF: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec @@ -686,23 +719,17 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__inline_imm__fi_offset0__kernel ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW64-LABEL: name: v_add_u32_e32__inline_imm__fi_offset0__kernel - ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec + ; FLATSCRW64: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__inline_imm__fi_offset0__kernel - ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec + ; FLATSCRW32: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e32 12, %stack.0, implicit $exec SI_RETURN implicit $vgpr0 @@ -724,8 +751,6 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__inline_imm__fi_offset0__kernel ; MUBUF: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec @@ -734,23 +759,17 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__inline_imm__fi_offset0__kernel ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW64-LABEL: name: v_add_u32_e64__inline_imm__fi_offset0__kernel - ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec + ; FLATSCRW64: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e64__inline_imm__fi_offset0__kernel - ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec + ; FLATSCRW32: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e64 12, %stack.0, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -775,8 +794,6 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__inline_imm__fi_literal__kernel ; MUBUF: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec @@ -785,23 +802,17 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__inline_imm__fi_literal__kernel ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW64-LABEL: name: v_add_u32_e32__inline_imm__fi_literal__kernel - ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec + ; FLATSCRW64: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__inline_imm__fi_literal__kernel - ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec + ; FLATSCRW32: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e32 12, %stack.1, implicit $exec SI_RETURN implicit $vgpr0 @@ -824,8 +835,6 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__inline_imm__fi_literal__kernel ; MUBUF: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec @@ -834,23 +843,17 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__inline_imm__fi_literal__kernel ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW64-LABEL: name: v_add_u32_e64__inline_imm__fi_literal__kernel - ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec + ; FLATSCRW64: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e64__inline_imm__fi_literal__kernel - ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec + ; FLATSCRW32: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e64 12, %stack.1, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -873,8 +876,6 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__fi_literal__inline_imm__kernel ; MUBUF: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec @@ -883,23 +884,17 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__fi_literal__inline_imm__kernel ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW64-LABEL: name: v_add_u32_e64__fi_literal__inline_imm__kernel - ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec + ; FLATSCRW64: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e64__fi_literal__inline_imm__kernel - ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec + ; FLATSCRW32: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e64 %stack.1, 12, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -922,8 +917,6 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__inline_imm__fi_literal__kernel__clamp ; MUBUF: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e64 44, 0, 1, implicit $exec @@ -932,23 +925,17 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__inline_imm__fi_literal__kernel__clamp ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 44, 0, 1, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW64-LABEL: name: v_add_u32_e64__inline_imm__fi_literal__kernel__clamp - ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e64 44, 0, 1, implicit $exec + ; FLATSCRW64: renamable $vgpr0 = V_ADD_U32_e64 44, 0, 1, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e64__inline_imm__fi_literal__kernel__clamp - ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg - ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 44, 0, 1, implicit $exec + ; FLATSCRW32: renamable $vgpr0 = V_ADD_U32_e64 44, 0, 1, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e64 12, %stack.1, 1, implicit $exec SI_RETURN implicit $vgpr0 @@ -973,8 +960,6 @@ body: | ; MUBUF-LABEL: name: killed_reg_regression ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_LSHLREV_B32_e32 2, killed $vgpr0, implicit $exec @@ -988,8 +973,6 @@ body: | ; MUBUFW32-LABEL: name: killed_reg_regression ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_LSHLREV_B32_e32 2, killed $vgpr0, implicit $exec @@ -1003,8 +986,6 @@ body: | ; FLATSCRW64-LABEL: name: killed_reg_regression ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_LSHLREV_B32_e32 2, killed $vgpr0, implicit $exec ; FLATSCRW64-NEXT: renamable $vgpr1 = V_MOV_B32_e32 $vgpr0, implicit $exec ; FLATSCRW64-NEXT: renamable $vgpr2 = V_MOV_B32_e32 15, implicit $exec @@ -1016,8 +997,6 @@ body: | ; FLATSCRW32-LABEL: name: killed_reg_regression ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_LSHLREV_B32_e32 2, killed $vgpr0, implicit $exec ; FLATSCRW32-NEXT: renamable $vgpr1 = V_MOV_B32_e32 $vgpr0, implicit $exec ; FLATSCRW32-NEXT: renamable $vgpr2 = V_MOV_B32_e32 15, implicit $exec @@ -1051,8 +1030,6 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__kernel_fi_offset0__other_vgpr_live_after ; MUBUF: liveins: $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec @@ -1061,8 +1038,6 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__kernel_fi_offset0__other_vgpr_live_after ; MUBUFW32: liveins: $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec @@ -1071,16 +1046,12 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__kernel_fi_offset0__other_vgpr_live_after ; FLATSCRW64: liveins: $vgpr1 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__kernel_fi_offset0__other_vgpr_live_after ; FLATSCRW32: liveins: $vgpr1 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 renamable $vgpr0 = V_ADD_U32_e32 renamable $vgpr1, %stack.0, implicit $exec @@ -1104,8 +1075,6 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__kernel_other_vgpr_live_after__fi_offset0 ; MUBUF: liveins: $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec @@ -1114,8 +1083,6 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__kernel_other_vgpr_live_after__fi_offset0 ; MUBUFW32: liveins: $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec @@ -1124,16 +1091,12 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__kernel_other_vgpr_live_after__fi_offset0 ; FLATSCRW64: liveins: $vgpr1 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__kernel_other_vgpr_live_after__fi_offset0 ; FLATSCRW32: liveins: $vgpr1 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 renamable $vgpr0 = V_ADD_U32_e32 %stack.0, renamable $vgpr1, implicit $exec @@ -1157,8 +1120,6 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__kernel_fi_offset0__sgpr_live_after ; MUBUF: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $sgpr8, implicit $exec @@ -1167,8 +1128,6 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__kernel_fi_offset0__sgpr_live_after ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $sgpr8, implicit $exec @@ -1177,16 +1136,12 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__kernel_fi_offset0__sgpr_live_after ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $sgpr8, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__kernel_fi_offset0__sgpr_live_after ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $sgpr8, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8 renamable $vgpr0 = V_ADD_U32_e32 renamable $sgpr8, %stack.0, implicit $exec @@ -1210,8 +1165,6 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__kernel_fi_offset0__other_vgpr_live_after ; MUBUF: liveins: $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec @@ -1220,8 +1173,6 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__kernel_fi_offset0__other_vgpr_live_after ; MUBUFW32: liveins: $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec @@ -1230,16 +1181,12 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e64__kernel_fi_offset0__other_vgpr_live_after ; FLATSCRW64: liveins: $vgpr1 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 ; ; FLATSCRW32-LABEL: name: v_add_u32_e64__kernel_fi_offset0__other_vgpr_live_after ; FLATSCRW32: liveins: $vgpr1 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 renamable $vgpr0 = V_ADD_U32_e64 renamable $vgpr1, %stack.0, 0, implicit $exec @@ -1264,8 +1211,6 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__kernel_fi_offset72__sgpr_live_after ; MUBUF: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec @@ -1275,8 +1220,6 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__kernel_fi_offset72__sgpr_live_after ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec @@ -1286,8 +1229,6 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__kernel_fi_offset72__sgpr_live_after ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $sgpr8, killed $vgpr1, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8 @@ -1295,8 +1236,6 @@ body: | ; FLATSCRW32-LABEL: name: v_add_u32_e32__kernel_fi_offset72__sgpr_live_after ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $sgpr8, killed $vgpr1, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8 @@ -1322,8 +1261,6 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__kernel_fi_offset72__sgpr_live_after ; MUBUF: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec @@ -1333,8 +1270,6 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__kernel_fi_offset72__sgpr_live_after ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $sgpr8, 72, 0, implicit $exec @@ -1343,8 +1278,6 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e64__kernel_fi_offset72__sgpr_live_after ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e64 killed $vgpr1, $sgpr8, 0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8 @@ -1352,8 +1285,6 @@ body: | ; FLATSCRW32-LABEL: name: v_add_u32_e64__kernel_fi_offset72__sgpr_live_after ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $sgpr8, 72, 0, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8 renamable $vgpr0 = V_ADD_U32_e64 renamable $sgpr8, %stack.1, 0, implicit $exec @@ -1378,8 +1309,6 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset0__kernel ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: SI_RETURN implicit $vgpr0 @@ -1387,8 +1316,6 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset0__kernel ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 @@ -1396,15 +1323,11 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset0__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset0__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e32 $vgpr0, %stack.0, implicit $exec SI_RETURN implicit $vgpr0 @@ -1427,8 +1350,6 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__fi_offset0__identity_vgpr__kernel ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: SI_RETURN implicit $vgpr0 @@ -1436,8 +1357,6 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__fi_offset0__identity_vgpr__kernel ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 @@ -1445,15 +1364,11 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__fi_offset0__identity_vgpr__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__fi_offset0__identity_vgpr__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e32 %stack.0, $vgpr0, implicit $exec SI_RETURN implicit $vgpr0 @@ -1477,8 +1392,6 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__identity_vgpr__fi_offset0__kernel ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: SI_RETURN implicit $vgpr0 @@ -1486,8 +1399,6 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__identity_vgpr__fi_offset0__kernel ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 @@ -1495,15 +1406,11 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e64__identity_vgpr__fi_offset0__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e64__identity_vgpr__fi_offset0__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e64 $vgpr0, %stack.0, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -1527,8 +1434,6 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__fi_offset0__identity_vgpr__kernel ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: SI_RETURN implicit $vgpr0 @@ -1536,8 +1441,6 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__fi_offset0__identity_vgpr__kernel ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 @@ -1545,15 +1448,11 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e64__fi_offset0__identity_vgpr__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e64__fi_offset0__identity_vgpr__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e64 %stack.0, $vgpr0, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -1576,8 +1475,6 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__fi_offset0__identity_vgpr__kernel_kill ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: SI_RETURN implicit $vgpr0 @@ -1585,8 +1482,6 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__fi_offset0__identity_vgpr__kernel_kill ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 @@ -1594,15 +1489,11 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__fi_offset0__identity_vgpr__kernel_kill ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__fi_offset0__identity_vgpr__kernel_kill ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e32 %stack.0, killed $vgpr0, implicit $exec SI_RETURN implicit $vgpr0 @@ -1627,8 +1518,6 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset32__kernel ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e32 32, $vgpr0, implicit $exec @@ -1637,8 +1526,6 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset32__kernel ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 32, $vgpr0, implicit $exec @@ -1647,16 +1534,12 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset32__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 32, $vgpr0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset32__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 32, $vgpr0, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e32 $vgpr0, %stack.1, implicit $exec @@ -1683,8 +1566,6 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset72__kernel ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, $vgpr0, implicit $exec @@ -1693,8 +1574,6 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset72__kernel ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, $vgpr0, implicit $exec @@ -1703,16 +1582,12 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset72__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, $vgpr0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset72__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, $vgpr0, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e32 $vgpr0, %stack.1, implicit $exec @@ -1738,8 +1613,6 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__fi_offset72__identity_vgpr__kernel ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, $vgpr0, implicit $exec @@ -1748,8 +1621,6 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__fi_offset72__identity_vgpr__kernel ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, $vgpr0, implicit $exec @@ -1758,16 +1629,12 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__fi_offset72__identity_vgpr__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, $vgpr0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__fi_offset72__identity_vgpr__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, $vgpr0, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e32 %stack.1, $vgpr0, implicit $exec @@ -1793,8 +1660,6 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__fi_offset32__identity_vgpr__kernel ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e32 32, $vgpr0, implicit $exec @@ -1803,8 +1668,6 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__fi_offset32__identity_vgpr__kernel ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 32, $vgpr0, implicit $exec @@ -1813,16 +1676,12 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__fi_offset32__identity_vgpr__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 32, $vgpr0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__fi_offset32__identity_vgpr__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 32, $vgpr0, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e32 %stack.1, $vgpr0, implicit $exec @@ -1848,8 +1707,6 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__identity_vgpr__fi_offset32__kernel ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $vgpr0, 32, 0, implicit $exec @@ -1858,8 +1715,6 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__identity_vgpr__fi_offset32__kernel ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $vgpr0, 32, 0, implicit $exec @@ -1868,16 +1723,12 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e64__identity_vgpr__fi_offset32__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $vgpr0, 32, 0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e64__identity_vgpr__fi_offset32__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $vgpr0, 32, 0, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e64 $vgpr0, %stack.1, 0, implicit $exec diff --git a/llvm/test/CodeGen/AMDGPU/frame-index-elimination-tied-operand.mir b/llvm/test/CodeGen/AMDGPU/frame-index-elimination-tied-operand.mir index e861a15981186..b4a9e3a16136a 100644 --- a/llvm/test/CodeGen/AMDGPU/frame-index-elimination-tied-operand.mir +++ b/llvm/test/CodeGen/AMDGPU/frame-index-elimination-tied-operand.mir @@ -1,7 +1,15 @@ # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -run-pass=prologepilog -o - %s | FileCheck -check-prefix=GFX11 %s + +--- | + define void @tied_operand_test() #0 { + entry: + unreachable + } + attributes #0 = { nounwind } ... --- +--- name: tied_operand_test tracksRegLiveness: true stack: @@ -21,8 +29,6 @@ body: | ; GFX11-LABEL: name: tied_operand_test ; GFX11: liveins: $sgpr0_sgpr1 ; GFX11-NEXT: {{ $}} - ; GFX11-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11-NEXT: renamable $vgpr0 = V_MOV_B32_e32 123, implicit $exec ; GFX11-NEXT: renamable $vgpr0 = SCRATCH_LOAD_SHORT_D16_HI_ST 0, 0, killed renamable $vgpr0, implicit $exec, implicit $flat_scr ; GFX11-NEXT: renamable $sgpr0 = S_LOAD_DWORD_IMM killed renamable $sgpr0_sgpr1, 4, 0 diff --git a/llvm/test/CodeGen/AMDGPU/inflate-av-remat-imm.mir b/llvm/test/CodeGen/AMDGPU/inflate-av-remat-imm.mir index 2872cfd212273..7cdb7c4ff1a9c 100644 --- a/llvm/test/CodeGen/AMDGPU/inflate-av-remat-imm.mir +++ b/llvm/test/CodeGen/AMDGPU/inflate-av-remat-imm.mir @@ -4,6 +4,13 @@ # Compare results of using V_MOV_B32 vs. AV_MOV_B32_IMM_PSEUDO during # allocation. +--- | + define void @av_mov_b32_split() #0 { unreachable } + define void @v_mov_b32_split() #0 { unreachable } + define void @av_mov_b64_split() #0 { unreachable } + attributes #0 = { nounwind } +... +--- --- name: av_mov_b32_split tracksRegLiveness: true @@ -19,8 +26,6 @@ body: | ; CHECK-LABEL: name: av_mov_b32_split ; CHECK: liveins: $agpr3, $agpr4, $vgpr0, $sgpr4_sgpr5 ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: renamable $agpr0 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec ; CHECK-NEXT: renamable $agpr1 = V_ACCVGPR_WRITE_B32_e64 1, implicit $exec ; CHECK-NEXT: renamable $agpr2 = V_ACCVGPR_WRITE_B32_e64 2, implicit $exec @@ -70,8 +75,6 @@ body: | ; CHECK-LABEL: name: v_mov_b32_split ; CHECK: liveins: $agpr3, $agpr4, $vgpr0, $sgpr4_sgpr5 ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: renamable $vgpr0 = V_MOV_B32_e32 0, implicit $exec ; CHECK-NEXT: renamable $vgpr1 = V_MOV_B32_e32 1, implicit $exec ; CHECK-NEXT: renamable $vgpr2 = V_MOV_B32_e32 2, implicit $exec @@ -124,8 +127,6 @@ body: | ; CHECK-LABEL: name: av_mov_b64_split ; CHECK: liveins: $agpr6, $agpr7, $agpr8, $agpr9, $vgpr0, $sgpr4_sgpr5 ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec, implicit-def $agpr0_agpr1 ; CHECK-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec, implicit-def $agpr0_agpr1 ; CHECK-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 1, implicit $exec, implicit-def $agpr2_agpr3 diff --git a/llvm/test/CodeGen/AMDGPU/issue98474-assigned-physreg-interference.mir b/llvm/test/CodeGen/AMDGPU/issue98474-assigned-physreg-interference.mir index e44736584767b..ce1e8efb06435 100644 --- a/llvm/test/CodeGen/AMDGPU/issue98474-assigned-physreg-interference.mir +++ b/llvm/test/CodeGen/AMDGPU/issue98474-assigned-physreg-interference.mir @@ -1,6 +1,11 @@ # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5 # RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 -start-before=greedy,2 -stop-after=tailduplication -verify-machineinstrs -o - %s | FileCheck %s +--- | + define void @undef_subreg_def_live_out_tailduplicate_vreg96_undef_sub1_sub2_assigned_physreg_interference() #0 { unreachable } + attributes #0 = { nounwind } +... +--- --- name: undef_subreg_def_live_out_tailduplicate_vreg96_undef_sub1_sub2_assigned_physreg_interference tracksRegLiveness: true @@ -14,8 +19,6 @@ body: | ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) ; CHECK-NEXT: liveins: $sgpr0, $vgpr2 ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: S_CMP_EQ_U32 $sgpr0, 0, implicit-def $scc ; CHECK-NEXT: S_CBRANCH_SCC0 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} diff --git a/llvm/test/CodeGen/AMDGPU/issue98474-virtregrewriter-live-out-undef-subregisters.mir b/llvm/test/CodeGen/AMDGPU/issue98474-virtregrewriter-live-out-undef-subregisters.mir index a244a433a4efb..eeb0c56fbb8e7 100644 --- a/llvm/test/CodeGen/AMDGPU/issue98474-virtregrewriter-live-out-undef-subregisters.mir +++ b/llvm/test/CodeGen/AMDGPU/issue98474-virtregrewriter-live-out-undef-subregisters.mir @@ -6,6 +6,16 @@ # the physical subregister. Without this, a verifier error would # appear after tail duplication. +--- | + define void @undef_subreg_def_live_out_tailduplicate_vreg64_undef_sub1() #0 { unreachable } + define void @undef_subreg_def_live_out_tailduplicate_vreg96_undef_sub1_sub2() #0 { unreachable } + define void @undef_subreg_def_live_out_tailduplicate_vreg96_undef_sub0_sub2() #0 { unreachable } + define void @undef_subreg_def_live_out_tailduplicate_vreg64_undef_sub1_undef_use_in_def_block() #0 { unreachable } + define void @undef_subreg_def_live_out_tailduplicate_vreg64_undef_sub1_no_phi_use() #0 { unreachable } + define void @assigned_physreg_subregister_interference() #0 { unreachable } + attributes #0 = { nounwind } +... +--- --- name: undef_subreg_def_live_out_tailduplicate_vreg64_undef_sub1 tracksRegLiveness: true @@ -19,8 +29,6 @@ body: | ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) ; CHECK-NEXT: liveins: $sgpr0 ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: S_CMP_EQ_U32 $sgpr0, 0, implicit-def $scc ; CHECK-NEXT: S_CBRANCH_SCC0 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} @@ -69,8 +77,6 @@ body: | ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) ; CHECK-NEXT: liveins: $sgpr0 ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: S_CMP_EQ_U32 $sgpr0, 0, implicit-def $scc ; CHECK-NEXT: S_CBRANCH_SCC0 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} @@ -119,8 +125,6 @@ body: | ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) ; CHECK-NEXT: liveins: $sgpr0 ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: S_CMP_EQ_U32 $sgpr0, 0, implicit-def $scc ; CHECK-NEXT: S_CBRANCH_SCC0 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} @@ -170,8 +174,6 @@ body: | ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) ; CHECK-NEXT: liveins: $sgpr0 ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: S_CMP_EQ_U32 $sgpr0, 0, implicit-def $scc ; CHECK-NEXT: S_CBRANCH_SCC0 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} @@ -223,8 +225,6 @@ body: | ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) ; CHECK-NEXT: liveins: $sgpr0 ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: S_CMP_EQ_U32 $sgpr0, 0, implicit-def $scc ; CHECK-NEXT: S_CBRANCH_SCC0 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} diff --git a/llvm/test/CodeGen/AMDGPU/kernel-mubuf-with-voffset.mir b/llvm/test/CodeGen/AMDGPU/kernel-mubuf-with-voffset.mir index f96c3c56896c0..94ba958e0daf0 100644 --- a/llvm/test/CodeGen/AMDGPU/kernel-mubuf-with-voffset.mir +++ b/llvm/test/CodeGen/AMDGPU/kernel-mubuf-with-voffset.mir @@ -9,7 +9,7 @@ ret void } - attributes #0 = { "frame-pointer"="all"} + attributes #0 = { "frame-pointer"="all" nounwind } ... --- name: kernel_vgpr32_spill @@ -31,8 +31,6 @@ body: | ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) ; CHECK-NEXT: liveins: $sgpr4, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: $sgpr33 = S_MOV_B32 0 ; CHECK-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; CHECK-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 diff --git a/llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll b/llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll index 34dd69f966637..2aae26b9470a8 100644 --- a/llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll +++ b/llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll @@ -33,8 +33,6 @@ define amdgpu_kernel void @partial_copy(<4 x i32> %arg) #0 { ; PEI-GFX908: bb.0 (%ir-block.0): ; PEI-GFX908-NEXT: liveins: $agpr4, $sgpr4_sgpr5, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr9 ; PEI-GFX908-NEXT: {{ $}} - ; PEI-GFX908-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; PEI-GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; PEI-GFX908-NEXT: $sgpr12_sgpr13_sgpr14_sgpr15 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; PEI-GFX908-NEXT: $sgpr12 = S_ADD_U32 $sgpr12, $sgpr9, implicit-def $scc, implicit-def $sgpr12_sgpr13_sgpr14_sgpr15 ; PEI-GFX908-NEXT: $sgpr13 = S_ADDC_U32 $sgpr13, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr12_sgpr13_sgpr14_sgpr15 @@ -81,8 +79,6 @@ define amdgpu_kernel void @partial_copy(<4 x i32> %arg) #0 { ; PEI-GFX90A: bb.0 (%ir-block.0): ; PEI-GFX90A-NEXT: liveins: $sgpr4_sgpr5 ; PEI-GFX90A-NEXT: {{ $}} - ; PEI-GFX90A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; PEI-GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; PEI-GFX90A-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2228233 /* reguse:AGPR_32 */, undef renamable $agpr0 ; PEI-GFX90A-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 7929866 /* regdef:VReg_128_Align2 */, def renamable $vgpr0_vgpr1_vgpr2_vgpr3 ; PEI-GFX90A-NEXT: renamable $agpr0_agpr1_agpr2_agpr3 = COPY killed renamable $vgpr0_vgpr1_vgpr2_vgpr3, implicit $exec diff --git a/llvm/test/CodeGen/AMDGPU/pei-reg-scavenger-position.mir b/llvm/test/CodeGen/AMDGPU/pei-reg-scavenger-position.mir index 8027373123d61..7882a725f2de1 100644 --- a/llvm/test/CodeGen/AMDGPU/pei-reg-scavenger-position.mir +++ b/llvm/test/CodeGen/AMDGPU/pei-reg-scavenger-position.mir @@ -6,6 +6,11 @@ # the current iterator in the scavenger, which was not yet set if the # spill was the first instruction in the block. +--- | + define void @scavenge_register_position() #0 { unreachable } + attributes #0 = { nounwind } +... +--- --- name: scavenge_register_position tracksRegLiveness: true @@ -27,8 +32,6 @@ body: | ; CHECK-NEXT: successors: %bb.1(0x80000000) ; CHECK-NEXT: liveins: $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr4 ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $sgpr4, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; CHECK-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; CHECK-NEXT: $sgpr4 = S_MOV_B32 524288 diff --git a/llvm/test/CodeGen/AMDGPU/regalloc-introduces-copy-sgpr-to-agpr.mir b/llvm/test/CodeGen/AMDGPU/regalloc-introduces-copy-sgpr-to-agpr.mir index 7f12571a6bdb4..fc56fbaf4152c 100644 --- a/llvm/test/CodeGen/AMDGPU/regalloc-introduces-copy-sgpr-to-agpr.mir +++ b/llvm/test/CodeGen/AMDGPU/regalloc-introduces-copy-sgpr-to-agpr.mir @@ -12,7 +12,7 @@ ret void } - attributes #0 = { "amdgpu-waves-per-eu"="7,7" } + attributes #0 = { "amdgpu-waves-per-eu"="7,7" nounwind } ... --- @@ -36,8 +36,6 @@ body: | ; GFX908-LABEL: name: regalloc_introduces_s_to_a_copy ; GFX908: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15, $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31, $sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47, $sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63, $vgpr32_vgpr33_vgpr34_vgpr35, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, $vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr7 ; GFX908-NEXT: {{ $}} - ; GFX908-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX908-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX908-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $sgpr7, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX908-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX908-NEXT: renamable $vgpr34 = GLOBAL_LOAD_DWORD undef $vgpr0_vgpr1, 0, 0, implicit $exec diff --git a/llvm/test/CodeGen/AMDGPU/sgpr-spill.mir b/llvm/test/CodeGen/AMDGPU/sgpr-spill.mir index 92c4249b26069..0369c970ff7d4 100644 --- a/llvm/test/CodeGen/AMDGPU/sgpr-spill.mir +++ b/llvm/test/CodeGen/AMDGPU/sgpr-spill.mir @@ -15,7 +15,7 @@ ret void } - attributes #0 = { "frame-pointer"="all" } + attributes #0 = { "frame-pointer"="all" nounwind } ... --- name: check_spill @@ -58,8 +58,6 @@ body: | ; GCN64-MUBUF-LABEL: name: check_spill ; GCN64-MUBUF: liveins: $sgpr8, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr11 ; GCN64-MUBUF-NEXT: {{ $}} - ; GCN64-MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GCN64-MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GCN64-MUBUF-NEXT: $sgpr33 = S_MOV_B32 0 ; GCN64-MUBUF-NEXT: $sgpr28 = S_MOV_B32 &SCRATCH_RSRC_DWORD0, implicit-def $sgpr28_sgpr29_sgpr30_sgpr31 ; GCN64-MUBUF-NEXT: $sgpr29 = S_MOV_B32 &SCRATCH_RSRC_DWORD1, implicit-def $sgpr28_sgpr29_sgpr30_sgpr31 @@ -224,8 +222,6 @@ body: | ; GCN32-MUBUF-LABEL: name: check_spill ; GCN32-MUBUF: liveins: $sgpr8, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr11 ; GCN32-MUBUF-NEXT: {{ $}} - ; GCN32-MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GCN32-MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GCN32-MUBUF-NEXT: $sgpr33 = S_MOV_B32 0 ; GCN32-MUBUF-NEXT: $sgpr96 = S_MOV_B32 &SCRATCH_RSRC_DWORD0, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99 ; GCN32-MUBUF-NEXT: $sgpr97 = S_MOV_B32 &SCRATCH_RSRC_DWORD1, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99 @@ -390,8 +386,6 @@ body: | ; GCN64-FLATSCR-LABEL: name: check_spill ; GCN64-FLATSCR: liveins: $sgpr8, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr11, $sgpr0_sgpr1 ; GCN64-FLATSCR-NEXT: {{ $}} - ; GCN64-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GCN64-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GCN64-FLATSCR-NEXT: $sgpr33 = S_MOV_B32 0 ; GCN64-FLATSCR-NEXT: $flat_scr_lo = S_ADD_U32 $sgpr0, $sgpr11, implicit-def $scc ; GCN64-FLATSCR-NEXT: $flat_scr_hi = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc @@ -623,8 +617,6 @@ body: | ; GCN64-MUBUF-LABEL: name: check_reload ; GCN64-MUBUF: liveins: $sgpr8, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr11 ; GCN64-MUBUF-NEXT: {{ $}} - ; GCN64-MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GCN64-MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GCN64-MUBUF-NEXT: $sgpr33 = S_MOV_B32 0 ; GCN64-MUBUF-NEXT: $sgpr28 = S_MOV_B32 &SCRATCH_RSRC_DWORD0, implicit-def $sgpr28_sgpr29_sgpr30_sgpr31 ; GCN64-MUBUF-NEXT: $sgpr29 = S_MOV_B32 &SCRATCH_RSRC_DWORD1, implicit-def $sgpr28_sgpr29_sgpr30_sgpr31 @@ -763,8 +755,6 @@ body: | ; GCN32-MUBUF-LABEL: name: check_reload ; GCN32-MUBUF: liveins: $sgpr8, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr11 ; GCN32-MUBUF-NEXT: {{ $}} - ; GCN32-MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GCN32-MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GCN32-MUBUF-NEXT: $sgpr33 = S_MOV_B32 0 ; GCN32-MUBUF-NEXT: $sgpr96 = S_MOV_B32 &SCRATCH_RSRC_DWORD0, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99 ; GCN32-MUBUF-NEXT: $sgpr97 = S_MOV_B32 &SCRATCH_RSRC_DWORD1, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99 @@ -903,8 +893,6 @@ body: | ; GCN64-FLATSCR-LABEL: name: check_reload ; GCN64-FLATSCR: liveins: $sgpr8, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr11, $sgpr0_sgpr1 ; GCN64-FLATSCR-NEXT: {{ $}} - ; GCN64-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GCN64-FLATSCR-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GCN64-FLATSCR-NEXT: $sgpr33 = S_MOV_B32 0 ; GCN64-FLATSCR-NEXT: $flat_scr_lo = S_ADD_U32 $sgpr0, $sgpr11, implicit-def $scc ; GCN64-FLATSCR-NEXT: $flat_scr_hi = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc diff --git a/llvm/test/CodeGen/AMDGPU/spill-special-sgpr.mir b/llvm/test/CodeGen/AMDGPU/spill-special-sgpr.mir index 3531b3dd75792..2fd89dd1cd2fa 100644 --- a/llvm/test/CodeGen/AMDGPU/spill-special-sgpr.mir +++ b/llvm/test/CodeGen/AMDGPU/spill-special-sgpr.mir @@ -8,7 +8,7 @@ ret void } - attributes #0 = { "frame-pointer"="all" } + attributes #0 = { "frame-pointer"="all" nounwind } ... --- name: check_vcc @@ -40,8 +40,6 @@ body: | ; GFX9-LABEL: name: check_vcc ; GFX9: liveins: $sgpr8, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr9 ; GFX9-NEXT: {{ $}} - ; GFX9-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX9-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX9-NEXT: $sgpr33 = S_MOV_B32 0 ; GFX9-NEXT: $sgpr12 = S_MOV_B32 &SCRATCH_RSRC_DWORD0, implicit-def $sgpr12_sgpr13_sgpr14_sgpr15 ; GFX9-NEXT: $sgpr13 = S_MOV_B32 &SCRATCH_RSRC_DWORD1, implicit-def $sgpr12_sgpr13_sgpr14_sgpr15 @@ -79,8 +77,6 @@ body: | ; GFX10-LABEL: name: check_vcc ; GFX10: liveins: $sgpr8, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr9 ; GFX10-NEXT: {{ $}} - ; GFX10-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10-NEXT: $sgpr33 = S_MOV_B32 0 ; GFX10-NEXT: $sgpr96 = S_MOV_B32 &SCRATCH_RSRC_DWORD0, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99 ; GFX10-NEXT: $sgpr97 = S_MOV_B32 &SCRATCH_RSRC_DWORD1, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99 @@ -118,8 +114,6 @@ body: | ; GFX11-LABEL: name: check_vcc ; GFX11: liveins: $sgpr8, $sgpr4_sgpr5, $sgpr6_sgpr7 ; GFX11-NEXT: {{ $}} - ; GFX11-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11-NEXT: $sgpr33 = S_MOV_B32 0 ; GFX11-NEXT: $vcc = IMPLICIT_DEF ; GFX11-NEXT: $sgpr0_sgpr1 = S_MOV_B64 $exec diff --git a/llvm/test/CodeGen/AMDGPU/transform-block-with-return-to-epilog.ll b/llvm/test/CodeGen/AMDGPU/transform-block-with-return-to-epilog.ll index 42386385a8016..0cf26be3ac24f 100644 --- a/llvm/test/CodeGen/AMDGPU/transform-block-with-return-to-epilog.ll +++ b/llvm/test/CodeGen/AMDGPU/transform-block-with-return-to-epilog.ll @@ -7,8 +7,6 @@ define amdgpu_ps float @simple_test_return_to_epilog(float %a) #0 { ; GCN: bb.0.entry: ; GCN-NEXT: liveins: $vgpr0 ; GCN-NEXT: {{ $}} - ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GCN-NEXT: SI_RETURN_TO_EPILOG killed $vgpr0 entry: ret float %a @@ -20,8 +18,6 @@ define amdgpu_ps float @test_return_to_epilog_into_end_block(i32 inreg %a, float ; GCN-NEXT: successors: %bb.1(0x80000000), %bb.2(0x00000000) ; GCN-NEXT: liveins: $sgpr2, $vgpr0 ; GCN-NEXT: {{ $}} - ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GCN-NEXT: S_CMP_LT_I32 killed renamable $sgpr2, 1, implicit-def $scc ; GCN-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; GCN-NEXT: {{ $}} @@ -55,8 +51,6 @@ define amdgpu_ps float @test_unify_return_to_epilog_into_end_block(i32 inreg %a, ; GCN-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000) ; GCN-NEXT: liveins: $sgpr2, $sgpr3, $vgpr0, $vgpr1 ; GCN-NEXT: {{ $}} - ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GCN-NEXT: S_CMP_LT_I32 killed renamable $sgpr2, 1, implicit-def $scc ; GCN-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc ; GCN-NEXT: {{ $}} @@ -109,8 +103,6 @@ define amdgpu_ps { <4 x float> } @test_return_to_epilog_with_optimized_kill(floa ; GCN-NEXT: successors: %bb.3(0x40000000), %bb.1(0x40000000) ; GCN-NEXT: liveins: $vgpr0 ; GCN-NEXT: {{ $}} - ; GCN-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GCN-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GCN-NEXT: renamable $vgpr1 = nofpexcept V_RCP_F32_e32 $vgpr0, implicit $mode, implicit $exec ; GCN-NEXT: $sgpr0_sgpr1 = S_MOV_B64 $exec ; GCN-NEXT: nofpexcept V_CMP_NGT_F32_e32 0, killed $vgpr1, implicit-def $vcc, implicit $mode, implicit $exec From 152d9fcfa2742841ed566b37a8e78f302307fe0a Mon Sep 17 00:00:00 2001 From: Scott Linder Date: Thu, 13 Nov 2025 20:57:13 +0000 Subject: [PATCH 4/4] Don't add IR sections to MIR tests just to add nounwind --- .../memory-legalizer-atomic-fence.ll | 480 ------------------ .../eliminate-frame-index-s-add-i32.mir | 166 ++++-- .../eliminate-frame-index-s-add-u32.mir | 31 +- ...minate-frame-index-v-add-co-u32-wave32.mir | 48 +- .../eliminate-frame-index-v-add-co-u32.mir | 197 ++++--- .../eliminate-frame-index-v-add-u32.mir | 259 ++++++++-- .../frame-index-elimination-tied-operand.mir | 10 +- .../CodeGen/AMDGPU/inflate-av-remat-imm.mir | 13 +- ...sue98474-assigned-physreg-interference.mir | 7 +- ...egrewriter-live-out-undef-subregisters.mir | 20 +- 10 files changed, 518 insertions(+), 713 deletions(-) diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/memory-legalizer-atomic-fence.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/memory-legalizer-atomic-fence.ll index ba95171ba5005..dd2ff86b7d67c 100644 --- a/llvm/test/CodeGen/AMDGPU/GlobalISel/memory-legalizer-atomic-fence.ll +++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/memory-legalizer-atomic-fence.ll @@ -13,24 +13,18 @@ define amdgpu_kernel void @system_one_as_acquire() #0 { ; GFX6-LABEL: name: system_one_as_acquire ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 3952 ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: system_one_as_acquire ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 3952 ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: system_one_as_acquire ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 16240 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -39,8 +33,6 @@ define amdgpu_kernel void @system_one_as_acquire() #0 { ; ; GFX10CU-LABEL: name: system_one_as_acquire ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 16240 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -49,8 +41,6 @@ define amdgpu_kernel void @system_one_as_acquire() #0 { ; ; GFX11WGP-LABEL: name: system_one_as_acquire ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 1015 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -59,8 +49,6 @@ define amdgpu_kernel void @system_one_as_acquire() #0 { ; ; GFX11CU-LABEL: name: system_one_as_acquire ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 1015 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -74,46 +62,34 @@ entry: define amdgpu_kernel void @system_one_as_release() #0 { ; GFX6-LABEL: name: system_one_as_release ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 3952 ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: system_one_as_release ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 3952 ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: system_one_as_release ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 16240 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: system_one_as_release ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 16240 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: system_one_as_release ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 1015 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: system_one_as_release ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 1015 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: S_ENDPGM 0 @@ -125,24 +101,18 @@ entry: define amdgpu_kernel void @system_one_as_acq_rel() #0 { ; GFX6-LABEL: name: system_one_as_acq_rel ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 3952 ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: system_one_as_acq_rel ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 3952 ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: system_one_as_acq_rel ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 16240 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -151,8 +121,6 @@ define amdgpu_kernel void @system_one_as_acq_rel() #0 { ; ; GFX10CU-LABEL: name: system_one_as_acq_rel ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 16240 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -161,8 +129,6 @@ define amdgpu_kernel void @system_one_as_acq_rel() #0 { ; ; GFX11WGP-LABEL: name: system_one_as_acq_rel ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 1015 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -171,8 +137,6 @@ define amdgpu_kernel void @system_one_as_acq_rel() #0 { ; ; GFX11CU-LABEL: name: system_one_as_acq_rel ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 1015 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -186,24 +150,18 @@ entry: define amdgpu_kernel void @system_one_as_seq_cst() #0 { ; GFX6-LABEL: name: system_one_as_seq_cst ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 3952 ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: system_one_as_seq_cst ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 3952 ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: system_one_as_seq_cst ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 16240 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -212,8 +170,6 @@ define amdgpu_kernel void @system_one_as_seq_cst() #0 { ; ; GFX10CU-LABEL: name: system_one_as_seq_cst ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 16240 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -222,8 +178,6 @@ define amdgpu_kernel void @system_one_as_seq_cst() #0 { ; ; GFX11WGP-LABEL: name: system_one_as_seq_cst ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 1015 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -232,8 +186,6 @@ define amdgpu_kernel void @system_one_as_seq_cst() #0 { ; ; GFX11CU-LABEL: name: system_one_as_seq_cst ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 1015 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -247,38 +199,26 @@ entry: define amdgpu_kernel void @singlethread_one_as_acquire() #0 { ; GFX6-LABEL: name: singlethread_one_as_acquire ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: singlethread_one_as_acquire ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: singlethread_one_as_acquire ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: singlethread_one_as_acquire ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: singlethread_one_as_acquire ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: singlethread_one_as_acquire ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("singlethread-one-as") acquire @@ -288,38 +228,26 @@ entry: define amdgpu_kernel void @singlethread_one_as_release() #0 { ; GFX6-LABEL: name: singlethread_one_as_release ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: singlethread_one_as_release ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: singlethread_one_as_release ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: singlethread_one_as_release ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: singlethread_one_as_release ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: singlethread_one_as_release ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("singlethread-one-as") release @@ -329,38 +257,26 @@ entry: define amdgpu_kernel void @singlethread_one_as_acq_rel() #0 { ; GFX6-LABEL: name: singlethread_one_as_acq_rel ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: singlethread_one_as_acq_rel ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: singlethread_one_as_acq_rel ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: singlethread_one_as_acq_rel ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: singlethread_one_as_acq_rel ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: singlethread_one_as_acq_rel ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("singlethread-one-as") acq_rel @@ -370,38 +286,26 @@ entry: define amdgpu_kernel void @singlethread_one_as_seq_cst() #0 { ; GFX6-LABEL: name: singlethread_one_as_seq_cst ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: singlethread_one_as_seq_cst ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: singlethread_one_as_seq_cst ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: singlethread_one_as_seq_cst ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: singlethread_one_as_seq_cst ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: singlethread_one_as_seq_cst ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("singlethread-one-as") seq_cst @@ -411,24 +315,18 @@ entry: define amdgpu_kernel void @agent_one_as_acquire() #0 { ; GFX6-LABEL: name: agent_one_as_acquire ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 3952 ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: agent_one_as_acquire ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 3952 ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: agent_one_as_acquire ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 16240 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -437,8 +335,6 @@ define amdgpu_kernel void @agent_one_as_acquire() #0 { ; ; GFX10CU-LABEL: name: agent_one_as_acquire ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 16240 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -447,8 +343,6 @@ define amdgpu_kernel void @agent_one_as_acquire() #0 { ; ; GFX11WGP-LABEL: name: agent_one_as_acquire ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 1015 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -457,8 +351,6 @@ define amdgpu_kernel void @agent_one_as_acquire() #0 { ; ; GFX11CU-LABEL: name: agent_one_as_acquire ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 1015 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -472,46 +364,34 @@ entry: define amdgpu_kernel void @agent_one_as_release() #0 { ; GFX6-LABEL: name: agent_one_as_release ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 3952 ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: agent_one_as_release ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 3952 ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: agent_one_as_release ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 16240 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: agent_one_as_release ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 16240 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: agent_one_as_release ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 1015 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: agent_one_as_release ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 1015 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: S_ENDPGM 0 @@ -523,24 +403,18 @@ entry: define amdgpu_kernel void @agent_one_as_acq_rel() #0 { ; GFX6-LABEL: name: agent_one_as_acq_rel ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 3952 ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: agent_one_as_acq_rel ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 3952 ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: agent_one_as_acq_rel ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 16240 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -549,8 +423,6 @@ define amdgpu_kernel void @agent_one_as_acq_rel() #0 { ; ; GFX10CU-LABEL: name: agent_one_as_acq_rel ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 16240 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -559,8 +431,6 @@ define amdgpu_kernel void @agent_one_as_acq_rel() #0 { ; ; GFX11WGP-LABEL: name: agent_one_as_acq_rel ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 1015 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -569,8 +439,6 @@ define amdgpu_kernel void @agent_one_as_acq_rel() #0 { ; ; GFX11CU-LABEL: name: agent_one_as_acq_rel ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 1015 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -584,24 +452,18 @@ entry: define amdgpu_kernel void @agent_one_as_seq_cst() #0 { ; GFX6-LABEL: name: agent_one_as_seq_cst ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 3952 ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: agent_one_as_seq_cst ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 3952 ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: agent_one_as_seq_cst ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 16240 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -610,8 +472,6 @@ define amdgpu_kernel void @agent_one_as_seq_cst() #0 { ; ; GFX10CU-LABEL: name: agent_one_as_seq_cst ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 16240 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -620,8 +480,6 @@ define amdgpu_kernel void @agent_one_as_seq_cst() #0 { ; ; GFX11WGP-LABEL: name: agent_one_as_seq_cst ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 1015 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -630,8 +488,6 @@ define amdgpu_kernel void @agent_one_as_seq_cst() #0 { ; ; GFX11CU-LABEL: name: agent_one_as_seq_cst ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 1015 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -645,20 +501,14 @@ entry: define amdgpu_kernel void @workgroup_one_as_acquire() #0 { ; GFX6-LABEL: name: workgroup_one_as_acquire ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: workgroup_one_as_acquire ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: workgroup_one_as_acquire ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 16240 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL0_INV implicit $exec @@ -666,14 +516,10 @@ define amdgpu_kernel void @workgroup_one_as_acquire() #0 { ; ; GFX10CU-LABEL: name: workgroup_one_as_acquire ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: workgroup_one_as_acquire ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 1015 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec @@ -681,8 +527,6 @@ define amdgpu_kernel void @workgroup_one_as_acquire() #0 { ; ; GFX11CU-LABEL: name: workgroup_one_as_acquire ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("workgroup-one-as") acquire @@ -692,20 +536,14 @@ entry: define amdgpu_kernel void @workgroup_one_as_release() #0 { ; GFX6-LABEL: name: workgroup_one_as_release ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: workgroup_one_as_release ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: workgroup_one_as_release ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 16240 ; GFX10WGP-NEXT: S_WAITCNT_lds_direct ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 @@ -713,8 +551,6 @@ define amdgpu_kernel void @workgroup_one_as_release() #0 { ; ; GFX10CU-LABEL: name: workgroup_one_as_release ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 16240 ; GFX10CU-NEXT: S_WAITCNT_lds_direct ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 @@ -722,16 +558,12 @@ define amdgpu_kernel void @workgroup_one_as_release() #0 { ; ; GFX11WGP-LABEL: name: workgroup_one_as_release ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 1015 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: workgroup_one_as_release ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 1015 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: S_ENDPGM 0 @@ -743,20 +575,14 @@ entry: define amdgpu_kernel void @workgroup_one_as_acq_rel() #0 { ; GFX6-LABEL: name: workgroup_one_as_acq_rel ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: workgroup_one_as_acq_rel ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: workgroup_one_as_acq_rel ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 16240 ; GFX10WGP-NEXT: S_WAITCNT_lds_direct ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 @@ -765,8 +591,6 @@ define amdgpu_kernel void @workgroup_one_as_acq_rel() #0 { ; ; GFX10CU-LABEL: name: workgroup_one_as_acq_rel ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 16240 ; GFX10CU-NEXT: S_WAITCNT_lds_direct ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 @@ -774,8 +598,6 @@ define amdgpu_kernel void @workgroup_one_as_acq_rel() #0 { ; ; GFX11WGP-LABEL: name: workgroup_one_as_acq_rel ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 1015 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec @@ -783,8 +605,6 @@ define amdgpu_kernel void @workgroup_one_as_acq_rel() #0 { ; ; GFX11CU-LABEL: name: workgroup_one_as_acq_rel ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 1015 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: S_ENDPGM 0 @@ -796,20 +616,14 @@ entry: define amdgpu_kernel void @workgroup_one_as_seq_cst() #0 { ; GFX6-LABEL: name: workgroup_one_as_seq_cst ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: workgroup_one_as_seq_cst ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: workgroup_one_as_seq_cst ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 16240 ; GFX10WGP-NEXT: S_WAITCNT_lds_direct ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 @@ -818,8 +632,6 @@ define amdgpu_kernel void @workgroup_one_as_seq_cst() #0 { ; ; GFX10CU-LABEL: name: workgroup_one_as_seq_cst ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 16240 ; GFX10CU-NEXT: S_WAITCNT_lds_direct ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 @@ -827,8 +639,6 @@ define amdgpu_kernel void @workgroup_one_as_seq_cst() #0 { ; ; GFX11WGP-LABEL: name: workgroup_one_as_seq_cst ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 1015 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec @@ -836,8 +646,6 @@ define amdgpu_kernel void @workgroup_one_as_seq_cst() #0 { ; ; GFX11CU-LABEL: name: workgroup_one_as_seq_cst ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 1015 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: S_ENDPGM 0 @@ -849,38 +657,26 @@ entry: define amdgpu_kernel void @wavefront_one_as_acquire() #0 { ; GFX6-LABEL: name: wavefront_one_as_acquire ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: wavefront_one_as_acquire ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: wavefront_one_as_acquire ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: wavefront_one_as_acquire ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: wavefront_one_as_acquire ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: wavefront_one_as_acquire ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("wavefront-one-as") acquire @@ -890,38 +686,26 @@ entry: define amdgpu_kernel void @wavefront_one_as_release() #0 { ; GFX6-LABEL: name: wavefront_one_as_release ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: wavefront_one_as_release ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: wavefront_one_as_release ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: wavefront_one_as_release ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: wavefront_one_as_release ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: wavefront_one_as_release ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("wavefront-one-as") release @@ -931,38 +715,26 @@ entry: define amdgpu_kernel void @wavefront_one_as_acq_rel() #0 { ; GFX6-LABEL: name: wavefront_one_as_acq_rel ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: wavefront_one_as_acq_rel ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: wavefront_one_as_acq_rel ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: wavefront_one_as_acq_rel ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: wavefront_one_as_acq_rel ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: wavefront_one_as_acq_rel ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("wavefront-one-as") acq_rel @@ -972,38 +744,26 @@ entry: define amdgpu_kernel void @wavefront_one_as_seq_cst() #0 { ; GFX6-LABEL: name: wavefront_one_as_seq_cst ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: wavefront_one_as_seq_cst ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: wavefront_one_as_seq_cst ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: wavefront_one_as_seq_cst ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: wavefront_one_as_seq_cst ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: wavefront_one_as_seq_cst ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("wavefront-one-as") seq_cst @@ -1013,24 +773,18 @@ entry: define amdgpu_kernel void @system_acquire() #0 { ; GFX6-LABEL: name: system_acquire ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 112 ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: system_acquire ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 112 ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: system_acquire ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 112 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -1039,8 +793,6 @@ define amdgpu_kernel void @system_acquire() #0 { ; ; GFX10CU-LABEL: name: system_acquire ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 112 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -1049,8 +801,6 @@ define amdgpu_kernel void @system_acquire() #0 { ; ; GFX11WGP-LABEL: name: system_acquire ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 7 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -1059,8 +809,6 @@ define amdgpu_kernel void @system_acquire() #0 { ; ; GFX11CU-LABEL: name: system_acquire ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 7 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -1074,46 +822,34 @@ entry: define amdgpu_kernel void @system_release() #0 { ; GFX6-LABEL: name: system_release ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 112 ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: system_release ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 112 ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: system_release ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 112 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: system_release ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 112 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: system_release ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 7 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: system_release ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 7 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: S_ENDPGM 0 @@ -1125,24 +861,18 @@ entry: define amdgpu_kernel void @system_acq_rel() #0 { ; GFX6-LABEL: name: system_acq_rel ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 112 ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: system_acq_rel ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 112 ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: system_acq_rel ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 112 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -1151,8 +881,6 @@ define amdgpu_kernel void @system_acq_rel() #0 { ; ; GFX10CU-LABEL: name: system_acq_rel ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 112 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -1161,8 +889,6 @@ define amdgpu_kernel void @system_acq_rel() #0 { ; ; GFX11WGP-LABEL: name: system_acq_rel ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 7 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -1171,8 +897,6 @@ define amdgpu_kernel void @system_acq_rel() #0 { ; ; GFX11CU-LABEL: name: system_acq_rel ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 7 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -1186,24 +910,18 @@ entry: define amdgpu_kernel void @system_seq_cst() #0 { ; GFX6-LABEL: name: system_seq_cst ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 112 ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: system_seq_cst ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 112 ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: system_seq_cst ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 112 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -1212,8 +930,6 @@ define amdgpu_kernel void @system_seq_cst() #0 { ; ; GFX10CU-LABEL: name: system_seq_cst ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 112 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -1222,8 +938,6 @@ define amdgpu_kernel void @system_seq_cst() #0 { ; ; GFX11WGP-LABEL: name: system_seq_cst ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 7 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -1232,8 +946,6 @@ define amdgpu_kernel void @system_seq_cst() #0 { ; ; GFX11CU-LABEL: name: system_seq_cst ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 7 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -1247,38 +959,26 @@ entry: define amdgpu_kernel void @singlethread_acquire() #0 { ; GFX6-LABEL: name: singlethread_acquire ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: singlethread_acquire ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: singlethread_acquire ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: singlethread_acquire ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: singlethread_acquire ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: singlethread_acquire ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("singlethread") acquire @@ -1288,38 +988,26 @@ entry: define amdgpu_kernel void @singlethread_release() #0 { ; GFX6-LABEL: name: singlethread_release ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: singlethread_release ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: singlethread_release ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: singlethread_release ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: singlethread_release ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: singlethread_release ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("singlethread") release @@ -1329,38 +1017,26 @@ entry: define amdgpu_kernel void @singlethread_acq_rel() #0 { ; GFX6-LABEL: name: singlethread_acq_rel ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: singlethread_acq_rel ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: singlethread_acq_rel ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: singlethread_acq_rel ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: singlethread_acq_rel ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: singlethread_acq_rel ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("singlethread") acq_rel @@ -1370,38 +1046,26 @@ entry: define amdgpu_kernel void @singlethread_seq_cst() #0 { ; GFX6-LABEL: name: singlethread_seq_cst ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: singlethread_seq_cst ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: singlethread_seq_cst ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: singlethread_seq_cst ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: singlethread_seq_cst ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: singlethread_seq_cst ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("singlethread") seq_cst @@ -1411,24 +1075,18 @@ entry: define amdgpu_kernel void @agent_acquire() #0 { ; GFX6-LABEL: name: agent_acquire ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 112 ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: agent_acquire ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 112 ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: agent_acquire ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 112 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -1437,8 +1095,6 @@ define amdgpu_kernel void @agent_acquire() #0 { ; ; GFX10CU-LABEL: name: agent_acquire ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 112 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -1447,8 +1103,6 @@ define amdgpu_kernel void @agent_acquire() #0 { ; ; GFX11WGP-LABEL: name: agent_acquire ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 7 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -1457,8 +1111,6 @@ define amdgpu_kernel void @agent_acquire() #0 { ; ; GFX11CU-LABEL: name: agent_acquire ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 7 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -1472,46 +1124,34 @@ entry: define amdgpu_kernel void @agent_release() #0 { ; GFX6-LABEL: name: agent_release ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 112 ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: agent_release ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 112 ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: agent_release ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 112 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: agent_release ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 112 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: agent_release ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 7 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: agent_release ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 7 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: S_ENDPGM 0 @@ -1523,24 +1163,18 @@ entry: define amdgpu_kernel void @agent_acq_rel() #0 { ; GFX6-LABEL: name: agent_acq_rel ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 112 ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: agent_acq_rel ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 112 ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: agent_acq_rel ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 112 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -1549,8 +1183,6 @@ define amdgpu_kernel void @agent_acq_rel() #0 { ; ; GFX10CU-LABEL: name: agent_acq_rel ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 112 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -1559,8 +1191,6 @@ define amdgpu_kernel void @agent_acq_rel() #0 { ; ; GFX11WGP-LABEL: name: agent_acq_rel ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 7 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -1569,8 +1199,6 @@ define amdgpu_kernel void @agent_acq_rel() #0 { ; ; GFX11CU-LABEL: name: agent_acq_rel ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 7 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -1584,24 +1212,18 @@ entry: define amdgpu_kernel void @agent_seq_cst() #0 { ; GFX6-LABEL: name: agent_seq_cst ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 112 ; GFX6-NEXT: BUFFER_WBINVL1 implicit $exec ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: agent_seq_cst ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 112 ; GFX8-NEXT: BUFFER_WBINVL1_VOL implicit $exec ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: agent_seq_cst ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 112 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -1610,8 +1232,6 @@ define amdgpu_kernel void @agent_seq_cst() #0 { ; ; GFX10CU-LABEL: name: agent_seq_cst ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 112 ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -1620,8 +1240,6 @@ define amdgpu_kernel void @agent_seq_cst() #0 { ; ; GFX11WGP-LABEL: name: agent_seq_cst ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 7 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL1_INV implicit $exec @@ -1630,8 +1248,6 @@ define amdgpu_kernel void @agent_seq_cst() #0 { ; ; GFX11CU-LABEL: name: agent_seq_cst ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 7 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: BUFFER_GL1_INV implicit $exec @@ -1645,22 +1261,16 @@ entry: define amdgpu_kernel void @workgroup_acquire() #0 { ; GFX6-LABEL: name: workgroup_acquire ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 127 ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: workgroup_acquire ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 127 ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: workgroup_acquire ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 112 ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX10WGP-NEXT: BUFFER_GL0_INV implicit $exec @@ -1668,15 +1278,11 @@ define amdgpu_kernel void @workgroup_acquire() #0 { ; ; GFX10CU-LABEL: name: workgroup_acquire ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 49279 ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: workgroup_acquire ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 7 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec @@ -1684,8 +1290,6 @@ define amdgpu_kernel void @workgroup_acquire() #0 { ; ; GFX11CU-LABEL: name: workgroup_acquire ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 64519 ; GFX11CU-NEXT: S_ENDPGM 0 entry: @@ -1696,22 +1300,16 @@ entry: define amdgpu_kernel void @workgroup_release() #0 { ; GFX6-LABEL: name: workgroup_release ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 127 ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: workgroup_release ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 127 ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: workgroup_release ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 112 ; GFX10WGP-NEXT: S_WAITCNT_lds_direct ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 @@ -1719,8 +1317,6 @@ define amdgpu_kernel void @workgroup_release() #0 { ; ; GFX10CU-LABEL: name: workgroup_release ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 112 ; GFX10CU-NEXT: S_WAITCNT_lds_direct ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 @@ -1728,16 +1324,12 @@ define amdgpu_kernel void @workgroup_release() #0 { ; ; GFX11WGP-LABEL: name: workgroup_release ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 7 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: workgroup_release ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 7 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: S_ENDPGM 0 @@ -1749,22 +1341,16 @@ entry: define amdgpu_kernel void @workgroup_acq_rel() #0 { ; GFX6-LABEL: name: workgroup_acq_rel ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 127 ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: workgroup_acq_rel ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 127 ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: workgroup_acq_rel ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 112 ; GFX10WGP-NEXT: S_WAITCNT_lds_direct ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 @@ -1773,8 +1359,6 @@ define amdgpu_kernel void @workgroup_acq_rel() #0 { ; ; GFX10CU-LABEL: name: workgroup_acq_rel ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 112 ; GFX10CU-NEXT: S_WAITCNT_lds_direct ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 @@ -1782,8 +1366,6 @@ define amdgpu_kernel void @workgroup_acq_rel() #0 { ; ; GFX11WGP-LABEL: name: workgroup_acq_rel ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 7 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec @@ -1791,8 +1373,6 @@ define amdgpu_kernel void @workgroup_acq_rel() #0 { ; ; GFX11CU-LABEL: name: workgroup_acq_rel ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 7 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: S_ENDPGM 0 @@ -1804,22 +1384,16 @@ entry: define amdgpu_kernel void @workgroup_seq_cst() #0 { ; GFX6-LABEL: name: workgroup_seq_cst ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_WAITCNT_soft 127 ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: workgroup_seq_cst ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_WAITCNT_soft 127 ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: workgroup_seq_cst ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_WAITCNT_soft 112 ; GFX10WGP-NEXT: S_WAITCNT_lds_direct ; GFX10WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 @@ -1828,8 +1402,6 @@ define amdgpu_kernel void @workgroup_seq_cst() #0 { ; ; GFX10CU-LABEL: name: workgroup_seq_cst ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_WAITCNT_soft 112 ; GFX10CU-NEXT: S_WAITCNT_lds_direct ; GFX10CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 @@ -1837,8 +1409,6 @@ define amdgpu_kernel void @workgroup_seq_cst() #0 { ; ; GFX11WGP-LABEL: name: workgroup_seq_cst ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_WAITCNT_soft 7 ; GFX11WGP-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11WGP-NEXT: BUFFER_GL0_INV implicit $exec @@ -1846,8 +1416,6 @@ define amdgpu_kernel void @workgroup_seq_cst() #0 { ; ; GFX11CU-LABEL: name: workgroup_seq_cst ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_WAITCNT_soft 7 ; GFX11CU-NEXT: S_WAITCNT_VSCNT_soft undef $sgpr_null, 0 ; GFX11CU-NEXT: S_ENDPGM 0 @@ -1859,38 +1427,26 @@ entry: define amdgpu_kernel void @wavefront_acquire() #0 { ; GFX6-LABEL: name: wavefront_acquire ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: wavefront_acquire ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: wavefront_acquire ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: wavefront_acquire ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: wavefront_acquire ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: wavefront_acquire ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("wavefront") acquire @@ -1900,38 +1456,26 @@ entry: define amdgpu_kernel void @wavefront_release() #0 { ; GFX6-LABEL: name: wavefront_release ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: wavefront_release ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: wavefront_release ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: wavefront_release ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: wavefront_release ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: wavefront_release ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("wavefront") release @@ -1941,38 +1485,26 @@ entry: define amdgpu_kernel void @wavefront_acq_rel() #0 { ; GFX6-LABEL: name: wavefront_acq_rel ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: wavefront_acq_rel ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: wavefront_acq_rel ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: wavefront_acq_rel ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: wavefront_acq_rel ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: wavefront_acq_rel ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("wavefront") acq_rel @@ -1982,38 +1514,26 @@ entry: define amdgpu_kernel void @wavefront_seq_cst() #0 { ; GFX6-LABEL: name: wavefront_seq_cst ; GFX6: bb.0.entry: - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX6-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX6-NEXT: S_ENDPGM 0 ; ; GFX8-LABEL: name: wavefront_seq_cst ; GFX8: bb.0.entry: - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: S_ENDPGM 0 ; ; GFX10WGP-LABEL: name: wavefront_seq_cst ; GFX10WGP: bb.0.entry: - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10WGP-NEXT: S_ENDPGM 0 ; ; GFX10CU-LABEL: name: wavefront_seq_cst ; GFX10CU: bb.0.entry: - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX10CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10CU-NEXT: S_ENDPGM 0 ; ; GFX11WGP-LABEL: name: wavefront_seq_cst ; GFX11WGP: bb.0.entry: - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11WGP-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11WGP-NEXT: S_ENDPGM 0 ; ; GFX11CU-LABEL: name: wavefront_seq_cst ; GFX11CU: bb.0.entry: - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 - ; GFX11CU-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11CU-NEXT: S_ENDPGM 0 entry: fence syncscope("wavefront") seq_cst diff --git a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir index bd5dc4b2af318..dafd6cce2d878 100644 --- a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir +++ b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-i32.mir @@ -9,48 +9,6 @@ # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=FLATSCRW32 %s # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=FLATSCRW32 %s ---- | - define void @s_add_i32__inline_imm__fi_offset0() #0 { unreachable } - define void @s_add_i32__fi_offset0__inline_imm() #0 { unreachable } - define void @s_add_i32__inline_imm___fi_offset_inline_imm() #0 { unreachable } - define void @s_add_i32__literal__fi_offset0() #0 { unreachable } - define void @s_add_i32__fi_offset0__literal() #0 { unreachable } - define void @s_add_i32__literal__fi_offset96() #0 { unreachable } - define void @s_add_i32____fi_offset96__literal() #0 { unreachable } - define void @s_add_i32__sgpr__fi_offset0() #0 { unreachable } - define void @s_add_i32__fi_offset0__sgpr() #0 { unreachable } - define void @s_add_i32__sgpr__fi_literal_offset() #0 { unreachable } - define void @s_add_i32__fi_literal_offset__sgpr() #0 { unreachable } - define void @s_add_i32__kernel__literal__fi_offset96__offset_literal() #0 { unreachable } - define void @s_add_i32__kernel__literal__fi_offset96__offset_literal_live_scc() #0 { unreachable } - define void @s_add_i32__kernel__fi_offset96__offset_literal__literal() #0 { unreachable } - define void @s_add_i32__kernel__sgpr__fi_literal_offset() #0 { unreachable } - define void @s_add_i32__kernel__fi_literal_offset__sgpr() #0 { unreachable } - define void @s_add_i32__kernel__sgpr__fi_offset0__live_scc() #0 { unreachable } - define void @s_add_i32__sgpr__fi_offset0__live_scc() #0 { unreachable } - define void @s_add_i32__kernel__sgpr__fi_literal_offset__live_scc() #0 { unreachable } - define void @s_add_i32__sgpr__fi_literal_offset__live_scc() #0 { unreachable } - define void @s_add_i32__inlineimm__fi_offset_32__total_offset_inlineimm() #0 { unreachable } - define void @s_add_i32__fi_offset_32__inlineimm__total_offset_inlineimm() #0 { unreachable } - define void @s_add_i32__kernel_inlineimm__fi_offset_32__total_offset_inlineimm() #0 { unreachable } - define void @s_add_i32__kernel_fi_offset_32__inlineimm__total_offset_inlineimm() #0 { unreachable } - define void @s_add_i32__0__fi_offset0() #0 { unreachable } - define void @s_add_i32__fi_offset0__0() #0 { unreachable } - define void @s_add_i32__same_sgpr__fi_offset0() #0 { unreachable } - define void @s_add_i32__different_sgpr__fi_offset0() #0 { unreachable } - define void @s_add_i32__different_sgpr__fi_offset0_live_after() #0 { unreachable } - define void @s_add_i32__identity_sgpr__fi_offset0__kernel() #0 { unreachable } - define void @s_add_i32__fi_offset0__identity_sgpr__kernel() #0 { unreachable } - define void @s_add_i32__identity_sgpr__fi_offset32__kernel() #0 { unreachable } - define void @s_add_i32__fi_offset32__identity_sgpr__kernel() #0 { unreachable } - define void @s_add_i32__identity_sgpr__fi_offset0() #0 { unreachable } - define void @s_add_i32__fi_offset32__identity_sgpr() #0 { unreachable } - define void @s_add_i32_use_dst_reg_as_temp_regression() #0 { unreachable } - define void @s_add_i32_frame_index_elimination_no_sgpr_dead_scc_offset_zero() #0 { unreachable } - define void @s_add_i32_frame_index_elimination_no_sgpr_dead_scc_offset_non_zero() #0 { unreachable } - attributes #0 = { nounwind } -... ---- --- name: s_add_i32__inline_imm__fi_offset0 tracksRegLiveness: true @@ -487,6 +445,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__kernel__literal__fi_offset96__offset_literal ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_MOV_B32 164 @@ -495,17 +455,23 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__kernel__literal__fi_offset96__offset_literal ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_MOV_B32 164 ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7 ; ; FLATSCRW64-LABEL: name: s_add_i32__kernel__literal__fi_offset96__offset_literal - ; FLATSCRW64: renamable $sgpr7 = S_MOV_B32 164 + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $sgpr7 = S_MOV_B32 164 ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7 ; ; FLATSCRW32-LABEL: name: s_add_i32__kernel__literal__fi_offset96__offset_literal - ; FLATSCRW32: renamable $sgpr7 = S_MOV_B32 164 + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $sgpr7 = S_MOV_B32 164 ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7 renamable $sgpr7 = S_ADD_I32 68, %stack.1, implicit-def dead $scc SI_RETURN implicit $sgpr7 @@ -527,6 +493,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__kernel__literal__fi_offset96__offset_literal_live_scc ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 164, 0, implicit-def $scc @@ -535,17 +503,23 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__kernel__literal__fi_offset96__offset_literal_live_scc ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 164, 0, implicit-def $scc ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW64-LABEL: name: s_add_i32__kernel__literal__fi_offset96__offset_literal_live_scc - ; FLATSCRW64: renamable $sgpr7 = S_ADD_I32 164, 0, implicit-def $scc + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 164, 0, implicit-def $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW32-LABEL: name: s_add_i32__kernel__literal__fi_offset96__offset_literal_live_scc - ; FLATSCRW32: renamable $sgpr7 = S_ADD_I32 164, 0, implicit-def $scc + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 164, 0, implicit-def $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc renamable $sgpr7 = S_ADD_I32 68, %stack.1, implicit-def $scc SI_RETURN implicit $sgpr7, implicit $scc @@ -567,6 +541,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__kernel__fi_offset96__offset_literal__literal ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_MOV_B32 164 @@ -575,17 +551,23 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__kernel__fi_offset96__offset_literal__literal ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_MOV_B32 164 ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7 ; ; FLATSCRW64-LABEL: name: s_add_i32__kernel__fi_offset96__offset_literal__literal - ; FLATSCRW64: renamable $sgpr7 = S_MOV_B32 164 + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $sgpr7 = S_MOV_B32 164 ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7 ; ; FLATSCRW32-LABEL: name: s_add_i32__kernel__fi_offset96__offset_literal__literal - ; FLATSCRW32: renamable $sgpr7 = S_MOV_B32 164 + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $sgpr7 = S_MOV_B32 164 ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7 renamable $sgpr7 = S_ADD_I32 %stack.1, 68, implicit-def dead $scc SI_RETURN implicit $sgpr7 @@ -609,6 +591,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__kernel__sgpr__fi_literal_offset ; MUBUFW64: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 96, implicit-def dead $scc @@ -617,6 +601,8 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__kernel__sgpr__fi_literal_offset ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 96, implicit-def dead $scc @@ -625,12 +611,16 @@ body: | ; FLATSCRW64-LABEL: name: s_add_i32__kernel__sgpr__fi_literal_offset ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 96, implicit-def dead $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7 ; ; FLATSCRW32-LABEL: name: s_add_i32__kernel__sgpr__fi_literal_offset ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 96, implicit-def dead $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7 renamable $sgpr7 = S_ADD_I32 $sgpr8, %stack.1, implicit-def dead $scc @@ -655,6 +645,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__kernel__fi_literal_offset__sgpr ; MUBUFW64: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 96, $sgpr8, implicit-def dead $scc @@ -663,6 +655,8 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__kernel__fi_literal_offset__sgpr ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 96, $sgpr8, implicit-def dead $scc @@ -671,12 +665,16 @@ body: | ; FLATSCRW64-LABEL: name: s_add_i32__kernel__fi_literal_offset__sgpr ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 96, $sgpr8, implicit-def dead $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7 ; ; FLATSCRW32-LABEL: name: s_add_i32__kernel__fi_literal_offset__sgpr ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 96, $sgpr8, implicit-def dead $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7 renamable $sgpr7 = S_ADD_I32 %stack.1, $sgpr8, implicit-def dead $scc @@ -700,6 +698,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__kernel__sgpr__fi_offset0__live_scc ; MUBUFW64: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 0, implicit-def $scc @@ -708,6 +708,8 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__kernel__sgpr__fi_offset0__live_scc ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 0, implicit-def $scc @@ -716,12 +718,16 @@ body: | ; FLATSCRW64-LABEL: name: s_add_i32__kernel__sgpr__fi_offset0__live_scc ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 0, implicit-def $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW32-LABEL: name: s_add_i32__kernel__sgpr__fi_offset0__live_scc ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 0, implicit-def $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc renamable $sgpr7 = S_ADD_I32 $sgpr8, %stack.0, implicit-def $scc @@ -792,6 +798,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__kernel__sgpr__fi_literal_offset__live_scc ; MUBUFW64: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 96, implicit-def $scc @@ -800,6 +808,8 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__kernel__sgpr__fi_literal_offset__live_scc ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 96, implicit-def $scc @@ -808,12 +818,16 @@ body: | ; FLATSCRW64-LABEL: name: s_add_i32__kernel__sgpr__fi_literal_offset__live_scc ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 96, implicit-def $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW32-LABEL: name: s_add_i32__kernel__sgpr__fi_literal_offset__live_scc ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 $sgpr8, 96, implicit-def $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc renamable $sgpr7 = S_ADD_I32 $sgpr8, %stack.1, implicit-def $scc @@ -953,6 +967,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__kernel_inlineimm__fi_offset_32__total_offset_inlineimm ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 40, 0, implicit-def $scc @@ -961,17 +977,23 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__kernel_inlineimm__fi_offset_32__total_offset_inlineimm ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 40, 0, implicit-def $scc ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW64-LABEL: name: s_add_i32__kernel_inlineimm__fi_offset_32__total_offset_inlineimm - ; FLATSCRW64: renamable $sgpr7 = S_ADD_I32 40, 0, implicit-def $scc + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 40, 0, implicit-def $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW32-LABEL: name: s_add_i32__kernel_inlineimm__fi_offset_32__total_offset_inlineimm - ; FLATSCRW32: renamable $sgpr7 = S_ADD_I32 40, 0, implicit-def $scc + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 40, 0, implicit-def $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc renamable $sgpr7 = S_ADD_I32 8, %stack.1, implicit-def $scc SI_RETURN implicit $sgpr7, implicit $scc @@ -994,6 +1016,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__kernel_fi_offset_32__inlineimm__total_offset_inlineimm ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_I32 0, 40, implicit-def $scc @@ -1002,17 +1026,23 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__kernel_fi_offset_32__inlineimm__total_offset_inlineimm ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_I32 0, 40, implicit-def $scc ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW64-LABEL: name: s_add_i32__kernel_fi_offset_32__inlineimm__total_offset_inlineimm - ; FLATSCRW64: renamable $sgpr7 = S_ADD_I32 0, 40, implicit-def $scc + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_I32 0, 40, implicit-def $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW32-LABEL: name: s_add_i32__kernel_fi_offset_32__inlineimm__total_offset_inlineimm - ; FLATSCRW32: renamable $sgpr7 = S_ADD_I32 0, 40, implicit-def $scc + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_I32 0, 40, implicit-def $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc renamable $sgpr7 = S_ADD_I32 %stack.1, 8, implicit-def $scc SI_RETURN implicit $sgpr7, implicit $scc @@ -1240,6 +1270,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__identity_sgpr__fi_offset0__kernel ; MUBUFW64: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr8 = COPY $sgpr8 @@ -1248,6 +1280,8 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__identity_sgpr__fi_offset0__kernel ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr8 = COPY $sgpr8 @@ -1256,12 +1290,16 @@ body: | ; FLATSCRW64-LABEL: name: s_add_i32__identity_sgpr__fi_offset0__kernel ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $sgpr8 = COPY $sgpr8 ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr8 ; ; FLATSCRW32-LABEL: name: s_add_i32__identity_sgpr__fi_offset0__kernel ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $sgpr8 = COPY $sgpr8 ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr8 renamable $sgpr8 = S_ADD_I32 $sgpr8, %stack.0, implicit-def dead $scc @@ -1286,6 +1324,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__fi_offset0__identity_sgpr__kernel ; MUBUFW64: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr8 = COPY $sgpr8 @@ -1294,6 +1334,8 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__fi_offset0__identity_sgpr__kernel ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr8 = COPY $sgpr8 @@ -1302,12 +1344,16 @@ body: | ; FLATSCRW64-LABEL: name: s_add_i32__fi_offset0__identity_sgpr__kernel ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $sgpr8 = COPY $sgpr8 ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr8 ; ; FLATSCRW32-LABEL: name: s_add_i32__fi_offset0__identity_sgpr__kernel ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $sgpr8 = COPY $sgpr8 ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr8 renamable $sgpr8 = S_ADD_I32 $sgpr8, %stack.0, implicit-def dead $scc @@ -1333,6 +1379,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__identity_sgpr__fi_offset32__kernel ; MUBUFW64: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr8 = S_ADD_I32 $sgpr8, 32, implicit-def dead $scc @@ -1341,6 +1389,8 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__identity_sgpr__fi_offset32__kernel ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr8 = S_ADD_I32 $sgpr8, 32, implicit-def dead $scc @@ -1349,12 +1399,16 @@ body: | ; FLATSCRW64-LABEL: name: s_add_i32__identity_sgpr__fi_offset32__kernel ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $sgpr8 = S_ADD_I32 $sgpr8, 32, implicit-def dead $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr8 ; ; FLATSCRW32-LABEL: name: s_add_i32__identity_sgpr__fi_offset32__kernel ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $sgpr8 = S_ADD_I32 $sgpr8, 32, implicit-def dead $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr8 renamable $sgpr8 = S_ADD_I32 $sgpr8, %stack.1, implicit-def dead $scc @@ -1380,6 +1434,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_i32__fi_offset32__identity_sgpr__kernel ; MUBUFW64: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr8 = S_ADD_I32 $sgpr8, 32, implicit-def dead $scc @@ -1388,6 +1444,8 @@ body: | ; MUBUFW32-LABEL: name: s_add_i32__fi_offset32__identity_sgpr__kernel ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr8 = S_ADD_I32 $sgpr8, 32, implicit-def dead $scc @@ -1396,12 +1454,16 @@ body: | ; FLATSCRW64-LABEL: name: s_add_i32__fi_offset32__identity_sgpr__kernel ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $sgpr8 = S_ADD_I32 $sgpr8, 32, implicit-def dead $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr8 ; ; FLATSCRW32-LABEL: name: s_add_i32__fi_offset32__identity_sgpr__kernel ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $sgpr8 = S_ADD_I32 $sgpr8, 32, implicit-def dead $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr8 renamable $sgpr8 = S_ADD_I32 $sgpr8, %stack.1, implicit-def dead $scc diff --git a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-u32.mir b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-u32.mir index 716e99e977d32..442018d21734a 100644 --- a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-u32.mir +++ b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-s-add-u32.mir @@ -9,13 +9,6 @@ # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=FLATSCRW32 %s # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=FLATSCRW32 %s ---- | - define void @s_add_u32__inline_imm__fi_offset0() #0 { unreachable } - define void @s_add_u32__kernel__literal__fi_offset96__offset_literal() #0 { unreachable } - define void @s_add_u32__kernel__literal__fi_offset96__offset_literal_live_scc() #0 { unreachable } - attributes #0 = { nounwind } -... ---- --- name: s_add_u32__inline_imm__fi_offset0 tracksRegLiveness: true @@ -65,6 +58,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_MOV_B32 164 @@ -73,17 +68,23 @@ body: | ; MUBUFW32-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_MOV_B32 164 ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7 ; ; FLATSCRW64-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal - ; FLATSCRW64: renamable $sgpr7 = S_MOV_B32 164 + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $sgpr7 = S_MOV_B32 164 ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7 ; ; FLATSCRW32-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal - ; FLATSCRW32: renamable $sgpr7 = S_MOV_B32 164 + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $sgpr7 = S_MOV_B32 164 ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7 renamable $sgpr7 = S_ADD_U32 68, %stack.1, implicit-def dead $scc SI_RETURN implicit $sgpr7 @@ -105,6 +106,8 @@ body: | ; MUBUFW64-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal_live_scc ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $sgpr7 = S_ADD_U32 164, 0, implicit-def $scc @@ -113,17 +116,23 @@ body: | ; MUBUFW32-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal_live_scc ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $sgpr7 = S_ADD_U32 164, 0, implicit-def $scc ; MUBUFW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW64-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal_live_scc - ; FLATSCRW64: renamable $sgpr7 = S_ADD_U32 164, 0, implicit-def $scc + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $sgpr7 = S_ADD_U32 164, 0, implicit-def $scc ; FLATSCRW64-NEXT: SI_RETURN implicit $sgpr7, implicit $scc ; ; FLATSCRW32-LABEL: name: s_add_u32__kernel__literal__fi_offset96__offset_literal_live_scc - ; FLATSCRW32: renamable $sgpr7 = S_ADD_U32 164, 0, implicit-def $scc + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $sgpr7 = S_ADD_U32 164, 0, implicit-def $scc ; FLATSCRW32-NEXT: SI_RETURN implicit $sgpr7, implicit $scc renamable $sgpr7 = S_ADD_U32 68, %stack.1, implicit-def $scc SI_RETURN implicit $sgpr7, implicit $scc diff --git a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32-wave32.mir b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32-wave32.mir index 5e1f153486549..2a4b305f32cef 100644 --- a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32-wave32.mir +++ b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32-wave32.mir @@ -4,26 +4,6 @@ # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=+wavefrontsize32 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefixes=FLATSCRW32 %s ---- | - define void @v_add_co_u32_e64__inline_imm__fi_offset0() #0 { unreachable } - define void @v_add_co_u32_e64__inline_imm__fi_offset0__live_vcc() #0 { unreachable } - define void @v_add_co_u32_e64__inline_imm__fi_offset0__clamp() #0 { unreachable } - define void @v_add_co_u32_e64__inline_imm__fi_offset0__live_vcc_clamp() #0 { unreachable } - define void @v_add_co_u32_e64__fi_literal_offset__sgpr() #0 { unreachable } - define void @v_add_co_u32_e64__fi_literal_offset__sgpr_clamp() #0 { unreachable } - define void @v_add_co_u32_e64__fi_literal_offset__vgpr() #0 { unreachable } - define void @v_add_co_u32_e64__fi_literal_offset__vgpr__clamp() #0 { unreachable } - define void @v_add_co_u32_e64__fi_literal_offset__vgpr__live_vcc() #0 { unreachable } - define void @v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp() #0 { unreachable } - define void @v_add_co_u32_e64__fi_literal_offset__sgpr__scavenge_spill_required() #0 { unreachable } - define void @v_add_co_u32_e64__kernel_fi_offset0__other_vgpr_live_after() #0 { unreachable } - define void @v_add_co_u32_e64__kernel__other_vgpr_live_after__fi_offset0() #0 { unreachable } - define void @v_add_co_u32_e64__identity_vgpr__fi_offset0__kernel() #0 { unreachable } - define void @v_add_co_u32_e64__fi_offset0__identity_vgpr__kernel() #0 { unreachable } - define void @v_add_co_u32_e64__identity_vgpr__fi_offset32__kernel() #0 { unreachable } - attributes #0 = { nounwind } -... ---- --- name: v_add_co_u32_e64__inline_imm__fi_offset0 tracksRegLiveness: true @@ -294,11 +274,15 @@ machineFunctionInfo: body: | bb.0: ; MUBUFW32-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp - ; MUBUFW32: renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 84, 0, 1, implicit $exec + ; MUBUFW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; MUBUFW32-NEXT: renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 84, 0, 1, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp - ; FLATSCRW32: renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 84, 0, 1, implicit $exec + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 84, 0, 1, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, dead $vcc_lo = V_ADD_CO_U32_e64 12, %stack.1, 1, implicit $exec SI_RETURN implicit $vgpr0 @@ -357,12 +341,16 @@ body: | ; MUBUFW32-LABEL: name: v_add_co_u32_e64__kernel_fi_offset0__other_vgpr_live_after ; MUBUFW32: liveins: $vgpr1 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: renamable $vgpr0, renamable $sgpr8 = V_ADD_CO_U32_e64 $vgpr1, 0, 0, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 ; ; FLATSCRW32-LABEL: name: v_add_co_u32_e64__kernel_fi_offset0__other_vgpr_live_after ; FLATSCRW32: liveins: $vgpr1 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0, renamable $sgpr8 = V_ADD_CO_U32_e64 $vgpr1, 0, 0, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 renamable $vgpr0, renamable $sgpr8 = V_ADD_CO_U32_e64 renamable $vgpr1, %stack.0, 0, implicit $exec @@ -386,12 +374,16 @@ body: | ; MUBUFW32-LABEL: name: v_add_co_u32_e64__kernel__other_vgpr_live_after__fi_offset0 ; MUBUFW32: liveins: $vgpr1 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: renamable $vgpr0, renamable $sgpr8 = V_ADD_CO_U32_e64 0, $vgpr1, 0, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 ; ; FLATSCRW32-LABEL: name: v_add_co_u32_e64__kernel__other_vgpr_live_after__fi_offset0 ; FLATSCRW32: liveins: $vgpr1 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0, renamable $sgpr8 = V_ADD_CO_U32_e64 0, $vgpr1, 0, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 renamable $vgpr0, renamable $sgpr8 = V_ADD_CO_U32_e64 %stack.0, renamable $vgpr1, 0, implicit $exec @@ -416,11 +408,15 @@ body: | ; MUBUFW32-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset0__kernel ; MUBUFW32: liveins: $vgpr0 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset0__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, renamable dead $vcc_lo = V_ADD_CO_U32_e64 $vgpr0, %stack.0, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -444,11 +440,15 @@ body: | ; MUBUFW32-LABEL: name: v_add_co_u32_e64__fi_offset0__identity_vgpr__kernel ; MUBUFW32: liveins: $vgpr0 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_co_u32_e64__fi_offset0__identity_vgpr__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, renamable dead $vcc_lo = V_ADD_CO_U32_e64 %stack.0, $vgpr0, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -473,12 +473,16 @@ body: | ; MUBUFW32-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset32__kernel ; MUBUFW32: liveins: $vgpr0 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: renamable $vgpr0, dead renamable $vcc_lo = V_ADD_CO_U32_e64 $vgpr0, 32, 0, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset32__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0, dead renamable $vcc_lo = V_ADD_CO_U32_e64 $vgpr0, 32, 0, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, renamable dead $vcc_lo = V_ADD_CO_U32_e64 $vgpr0, %stack.1, 0, implicit $exec diff --git a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir index 7867e09efc3ef..ae53a3696fc2b 100644 --- a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir +++ b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-co-u32.mir @@ -10,63 +10,6 @@ # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -mattr=+wavefrontsize64 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefixes=FLATSCRW64,GFX11 %s # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -mattr=+wavefrontsize64 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefixes=FLATSCRW64,GFX12 %s ---- | - define void @v_add_co_u32_e32__inline_imm__fi_offset0() #0 { unreachable } - define void @v_add_co_u32_e32__inline_imm__fi_offset0_live_vcc() #0 { unreachable } - define void @v_add_co_u32_e32__inline_imm___fi_offset_inline_imm() #0 { unreachable } - define void @v_add_co_u32_e32__inline_imm___fi_offset_inline_imm_live_vcc() #0 { unreachable } - define void @v_add_co_u32_e32__literal__fi_offset0() #0 { unreachable } - define void @v_add_co_u32_e32__literal__fi_offset0_live_vcc() #0 { unreachable } - define void @v_add_co_u32_e32__literal__fi_offset0__offset_inlineimm() #0 { unreachable } - define void @v_add_co_u32_e32__literal__fi_offset0__offset_inlineimm_live_vcc() #0 { unreachable } - define void @v_add_co_u32_e32__vgpr__fi_offset0() #0 { unreachable } - define void @v_add_co_u32_e32__fi_offset0__vgpr() #0 { unreachable } - define void @v_add_co_u32_e32__vgpr__fi_literal_offset() #0 { unreachable } - define void @v_add_co_u32_e32__fi_literal_offset__vgpr() #0 { unreachable } - define void @v_add_co_u32_e32__sgpr__fi_literal_offset() #0 { unreachable } - define void @v_add_co_u32_e64__inline_imm__fi_offset0() #0 { unreachable } - define void @v_add_co_u32_e64__inline_imm__fi_offset0__clamp() #0 { unreachable } - define void @v_add_co_u32_e64__inline_imm__fi_offset0__live_vcc_clamp() #0 { unreachable } - define void @v_add_co_u32_e64__fi_literal_offset__sgpr() #0 { unreachable } - define void @v_add_co_u32_e64__fi_literal_offset__sgpr_clamp() #0 { unreachable } - define void @v_add_co_u32_e64__fi_literal_offset__vgpr() #0 { unreachable } - define void @v_add_co_u32_e64__fi_literal_offset__vgpr__clamp() #0 { unreachable } - define void @v_add_co_u32_e64__fi_literal_offset__vgpr__live_vcc() #0 { unreachable } - define void @v_add_co_u32_e32__inline_imm__fi_offset0__kernel() #0 { unreachable } - define void @v_add_co_u32_e32__inline_imm__fi_offset0__kernel__live_vcc() #0 { unreachable } - define void @v_add_co_u32_e32__inline_imm__fi_offset_literal__kernel() #0 { unreachable } - define void @v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp() #0 { unreachable } - define void @v_add_co_u32_e64__fi_literal_offset__sgpr__scavenge_spill_required() #0 { unreachable } - define void @v_add_co_u32_e32__fi_literal_offset__sgpr__scavenge_spill_required() #0 { unreachable } - define void @v_add_co_u32_e32__fi_literal_offset__vgpr__scavenge_spill_required() #0 { unreachable } - define void @v_add_co_u32_e32__kernel_fi_offset0__other_vgpr_live_after() #0 { unreachable } - define void @v_add_co_u32_e64__kernel_fi_offset0__other_vgpr_live_after() #0 { unreachable } - define void @v_add_co_u32_e64__kernel__other_vgpr_live_after__fi_offset0() #0 { unreachable } - define void @v_add_co_u32_e32__identity_vgpr__fi_offset0__kernel() #0 { unreachable } - define void @v_add_co_u32_e32__fi_offset0__identity_vgpr__kernel() #0 { unreachable } - define void @v_add_co_u32_e64__identity_vgpr__fi_offset0__kernel() #0 { unreachable } - define void @v_add_co_u32_e64__fi_offset0__identity_vgpr__kernel() #0 { unreachable } - define void @v_add_co_u32_e32__fi_offset0__identity_vgpr__kernel_kill() #0 { unreachable } - define void @v_add_co_u32_e32__fi_offset0__identity_vgpr__kernel_live_vcc() #0 { unreachable } - define void @v_add_co_u32_e32__identity_vgpr__fi_offset32__kernel() #0 { unreachable } - define void @v_add_co_u32_e32__identity_vgpr__fi_offset72__kernel() #0 { unreachable } - define void @v_add_co_u32_e32__fi_offset72__identity_vgpr__kernel() #0 { unreachable } - define void @v_add_co_u32_e32__fi_offset32__identity_vgpr__kernel() #0 { unreachable } - define void @v_add_co_u32_e64__identity_vgpr__fi_offset32__kernel() #0 { unreachable } - define void @v_add_co_u32_e64__fi_sgpr_kernel() #0 { unreachable } - define void @v_add_co_u32_e64__fi_sgpr_func() #0 { unreachable } - define void @v_add_co_u32_e64__fi_inc_same_vgpr_kernel() #0 { unreachable } - define void @v_add_co_u32_e64__fi_inc_same_vgpr_func() #0 { unreachable } - define void @v_add_co_u32_e64__fi_sgpr_kernel_live_co() #0 { unreachable } - define void @v_add_co_u32_e64_fi_sgpr_clobbered_register() #0 { unreachable } - define void @v_add_co_u32_e64_sgpr_fi_clobbered_register() #0 { unreachable } - define void @v_add_co_u32_e64_imm_fi_vop3_literal_error_non_vcc() #0 { unreachable } - define void @v_add_co_u32_e64_imm_fi_vop3_literal_error_non_vcc_live() #0 { unreachable } - define void @v_add_co_u32_e64_imm_fi_vop3_literal_error_vcc() #0 { unreachable } - define void @v_add_co_u32_e64_imm_fi_vop3_literal_error_vcc_live() #0 { unreachable } - attributes #0 = { nounwind } -... ---- --- name: v_add_co_u32_e32__inline_imm__fi_offset0 tracksRegLiveness: true @@ -947,13 +890,17 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__inline_imm__fi_offset0__kernel ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec ; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__inline_imm__fi_offset0__kernel - ; FLATSCRW64: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_CO_U32_e32 12, %stack.0, implicit-def dead $vcc, implicit $exec SI_RETURN implicit $vgpr0 @@ -975,6 +922,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__inline_imm__fi_offset0__kernel__live_vcc ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $vgpr1 = V_MOV_B32_e32 0, implicit $exec @@ -982,7 +931,9 @@ body: | ; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc ; ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__inline_imm__fi_offset0__kernel__live_vcc - ; FLATSCRW64: $vgpr1 = V_MOV_B32_e32 0, implicit $exec + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 0, implicit $exec ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 12, killed $vgpr1, implicit-def $vcc, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc renamable $vgpr0 = V_ADD_CO_U32_e32 12, %stack.0, implicit-def $vcc, implicit $exec @@ -1006,13 +957,17 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__inline_imm__fi_offset_literal__kernel ; MUBUFW64: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 84, implicit $exec ; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__inline_imm__fi_offset_literal__kernel - ; FLATSCRW64: renamable $vgpr0 = V_MOV_B32_e32 84, implicit $exec + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 84, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_CO_U32_e32 12, %stack.1, implicit-def dead $vcc, implicit $exec SI_RETURN implicit $vgpr0 @@ -1035,6 +990,8 @@ body: | ; GFX7-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp ; GFX7: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX7-NEXT: {{ $}} + ; GFX7-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX7-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX7-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX7-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX7-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec @@ -1044,6 +1001,8 @@ body: | ; GFX8-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp ; GFX8: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX8-NEXT: {{ $}} + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX8-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX8-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec @@ -1053,6 +1012,8 @@ body: | ; GFX900-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp ; GFX900: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX900-NEXT: {{ $}} + ; GFX900-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX900-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX900-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX900-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec @@ -1062,6 +1023,8 @@ body: | ; GFX90A-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp ; GFX90A: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A-NEXT: {{ $}} + ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX90A-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec @@ -1071,22 +1034,30 @@ body: | ; GFX10-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp ; GFX10: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX10-NEXT: {{ $}} + ; GFX10-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX10-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX10-NEXT: renamable $vgpr0, dead $vcc = V_ADD_CO_U32_e64 84, 0, 1, implicit $exec ; GFX10-NEXT: SI_RETURN implicit $vgpr0 ; ; GFX942-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp - ; GFX942: $sgpr4 = S_MOV_B32 72 + ; GFX942: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; GFX942-NEXT: $sgpr4 = S_MOV_B32 72 ; GFX942-NEXT: renamable $vgpr0, dead $vcc = V_ADD_CO_U32_e64 12, killed $sgpr4, 1, implicit $exec ; GFX942-NEXT: SI_RETURN implicit $vgpr0 ; ; GFX11-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp - ; GFX11: renamable $vgpr0, dead $vcc = V_ADD_CO_U32_e64 84, 0, 1, implicit $exec + ; GFX11: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; GFX11-NEXT: renamable $vgpr0, dead $vcc = V_ADD_CO_U32_e64 84, 0, 1, implicit $exec ; GFX11-NEXT: SI_RETURN implicit $vgpr0 ; ; GFX12-LABEL: name: v_add_co_u32_e64__inline_imm__fi_offset_literal__kernel__clamp - ; GFX12: renamable $vgpr0, dead $vcc = V_ADD_CO_U32_e64 84, 0, 1, implicit $exec + ; GFX12: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX12-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; GFX12-NEXT: renamable $vgpr0, dead $vcc = V_ADD_CO_U32_e64 84, 0, 1, implicit $exec ; GFX12-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, dead $vcc = V_ADD_CO_U32_e64 12, %stack.1, 1, implicit $exec SI_RETURN implicit $vgpr0 @@ -1297,6 +1268,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__kernel_fi_offset0__other_vgpr_live_after ; MUBUFW64: liveins: $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec @@ -1305,6 +1278,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__kernel_fi_offset0__other_vgpr_live_after ; FLATSCRW64: liveins: $vgpr1 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 renamable $vgpr0 = V_ADD_CO_U32_e32 renamable $vgpr1, %stack.0, implicit-def dead $vcc, implicit $exec @@ -1328,6 +1303,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e64__kernel_fi_offset0__other_vgpr_live_after ; MUBUFW64: liveins: $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 $vgpr1, 0, 0, implicit $exec @@ -1336,6 +1313,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e64__kernel_fi_offset0__other_vgpr_live_after ; FLATSCRW64: liveins: $vgpr1 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 $vgpr1, 0, 0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 renamable $vgpr1, %stack.0, 0, implicit $exec @@ -1359,6 +1338,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e64__kernel__other_vgpr_live_after__fi_offset0 ; MUBUFW64: liveins: $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 0, $vgpr1, 0, implicit $exec @@ -1367,6 +1348,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e64__kernel__other_vgpr_live_after__fi_offset0 ; FLATSCRW64: liveins: $vgpr1 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 0, $vgpr1, 0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 renamable $vgpr0, renamable $sgpr8_sgpr9 = V_ADD_CO_U32_e64 %stack.0, renamable $vgpr1, 0, implicit $exec @@ -1391,6 +1374,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__identity_vgpr__fi_offset0__kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0 @@ -1398,6 +1383,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__identity_vgpr__fi_offset0__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_CO_U32_e32 $vgpr0, %stack.0, implicit-def dead $vcc, implicit $exec SI_RETURN implicit $vgpr0 @@ -1420,6 +1407,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__fi_offset0__identity_vgpr__kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0 @@ -1427,6 +1416,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__fi_offset0__identity_vgpr__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_CO_U32_e32 %stack.0, $vgpr0, implicit-def dead $vcc, implicit $exec SI_RETURN implicit $vgpr0 @@ -1450,6 +1441,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset0__kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0 @@ -1457,6 +1450,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset0__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, renamable dead $vcc = V_ADD_CO_U32_e64 $vgpr0, %stack.0, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -1480,6 +1475,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e64__fi_offset0__identity_vgpr__kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0 @@ -1487,6 +1484,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e64__fi_offset0__identity_vgpr__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, renamable dead $vcc = V_ADD_CO_U32_e64 %stack.0, $vgpr0, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -1509,6 +1508,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__fi_offset0__identity_vgpr__kernel_kill ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0 @@ -1516,6 +1517,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__fi_offset0__identity_vgpr__kernel_kill ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_CO_U32_e32 %stack.0, killed $vgpr0, implicit-def dead $vcc, implicit $exec SI_RETURN implicit $vgpr0 @@ -1538,6 +1541,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__fi_offset0__identity_vgpr__kernel_live_vcc ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 0, $vgpr0, implicit-def $vcc, implicit $exec @@ -1546,6 +1551,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__fi_offset0__identity_vgpr__kernel_live_vcc ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 0, $vgpr0, implicit-def $vcc, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vcc renamable $vgpr0 = V_ADD_CO_U32_e32 %stack.0, $vgpr0, implicit-def $vcc, implicit $exec @@ -1571,6 +1578,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__identity_vgpr__fi_offset32__kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 32, $vgpr0, implicit-def dead $vcc, implicit $exec @@ -1579,6 +1588,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__identity_vgpr__fi_offset32__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 32, $vgpr0, implicit-def dead $vcc, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_CO_U32_e32 $vgpr0, %stack.1, implicit-def dead $vcc, implicit $exec @@ -1605,6 +1616,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__identity_vgpr__fi_offset72__kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 72, $vgpr0, implicit-def dead $vcc, implicit $exec @@ -1613,6 +1626,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__identity_vgpr__fi_offset72__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 72, $vgpr0, implicit-def dead $vcc, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_CO_U32_e32 $vgpr0, %stack.1, implicit-def dead $vcc, implicit $exec @@ -1638,6 +1653,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__fi_offset72__identity_vgpr__kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 72, $vgpr0, implicit-def dead $vcc, implicit $exec @@ -1646,6 +1663,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__fi_offset72__identity_vgpr__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 72, $vgpr0, implicit-def dead $vcc, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_CO_U32_e32 %stack.1, $vgpr0, implicit-def dead $vcc, implicit $exec @@ -1671,6 +1690,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e32__fi_offset32__identity_vgpr__kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 32, $vgpr0, implicit-def dead $vcc, implicit $exec @@ -1679,6 +1700,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e32__fi_offset32__identity_vgpr__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_CO_U32_e32 32, $vgpr0, implicit-def dead $vcc, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_CO_U32_e32 %stack.1, $vgpr0, implicit-def dead $vcc, implicit $exec @@ -1704,6 +1727,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset32__kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 $vgpr0, 32, 0, implicit $exec @@ -1712,6 +1737,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e64__identity_vgpr__fi_offset32__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 $vgpr0, 32, 0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, renamable dead $vcc = V_ADD_CO_U32_e64 $vgpr0, %stack.1, 0, implicit $exec @@ -1736,6 +1763,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e64__fi_sgpr_kernel ; MUBUFW64: liveins: $sgpr4, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 killed $sgpr4, implicit $exec @@ -1744,6 +1773,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e64__fi_sgpr_kernel ; FLATSCRW64: liveins: $sgpr4 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 killed $sgpr4, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, dead renamable $sgpr4_sgpr5 = V_ADD_CO_U32_e64 %stack.0, killed $sgpr4, 0, implicit $exec @@ -1811,6 +1842,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e64__fi_inc_same_vgpr_kernel ; MUBUFW64: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: SI_RETURN implicit $vgpr0 @@ -1818,6 +1851,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e64__fi_inc_same_vgpr_kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0, dead renamable $sgpr4_sgpr5 = V_ADD_CO_U32_e64 %stack.0, killed $vgpr0, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -1871,6 +1906,8 @@ body: | ; MUBUFW64-LABEL: name: v_add_co_u32_e64__fi_sgpr_kernel_live_co ; MUBUFW64: liveins: $sgpr4, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: {{ $}} + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW64-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW64-NEXT: renamable $vgpr0, renamable $sgpr4_sgpr5 = V_ADD_CO_U32_e64 0, killed $sgpr4, 0, implicit $exec @@ -1879,6 +1916,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_co_u32_e64__fi_sgpr_kernel_live_co ; FLATSCRW64: liveins: $sgpr4 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0, renamable $sgpr4_sgpr5 = V_ADD_CO_U32_e64 0, killed $sgpr4, 0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr4_sgpr5 renamable $vgpr0, renamable $sgpr4_sgpr5 = V_ADD_CO_U32_e64 %stack.0, killed $sgpr4, 0, implicit $exec @@ -1903,6 +1942,8 @@ body: | ; GFX7-LABEL: name: v_add_co_u32_e64_fi_sgpr_clobbered_register ; GFX7: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX7-NEXT: {{ $}} + ; GFX7-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX7-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX7-NEXT: $sgpr8_sgpr9_sgpr10_sgpr11 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX7-NEXT: $sgpr8 = S_ADD_U32 $sgpr8, $noreg, implicit-def $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX7-NEXT: $sgpr9 = S_ADDC_U32 $sgpr9, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 @@ -1915,6 +1956,8 @@ body: | ; GFX8-LABEL: name: v_add_co_u32_e64_fi_sgpr_clobbered_register ; GFX8: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX8-NEXT: {{ $}} + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: $sgpr8_sgpr9_sgpr10_sgpr11 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX8-NEXT: $sgpr8 = S_ADD_U32 $sgpr8, $noreg, implicit-def $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX8-NEXT: $sgpr9 = S_ADDC_U32 $sgpr9, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 @@ -1927,6 +1970,8 @@ body: | ; GFX900-LABEL: name: v_add_co_u32_e64_fi_sgpr_clobbered_register ; GFX900: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX900-NEXT: {{ $}} + ; GFX900-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX900-NEXT: $sgpr8_sgpr9_sgpr10_sgpr11 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX900-NEXT: $sgpr8 = S_ADD_U32 $sgpr8, $noreg, implicit-def $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX900-NEXT: $sgpr9 = S_ADDC_U32 $sgpr9, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 @@ -1939,6 +1984,8 @@ body: | ; GFX90A-LABEL: name: v_add_co_u32_e64_fi_sgpr_clobbered_register ; GFX90A: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A-NEXT: {{ $}} + ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX90A-NEXT: $sgpr8_sgpr9_sgpr10_sgpr11 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A-NEXT: $sgpr8 = S_ADD_U32 $sgpr8, $noreg, implicit-def $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX90A-NEXT: $sgpr9 = S_ADDC_U32 $sgpr9, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 @@ -1951,6 +1998,8 @@ body: | ; GFX10-LABEL: name: v_add_co_u32_e64_fi_sgpr_clobbered_register ; GFX10: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX10-NEXT: {{ $}} + ; GFX10-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10-NEXT: $sgpr96_sgpr97_sgpr98_sgpr99 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX10-NEXT: $sgpr96 = S_ADD_U32 $sgpr96, $noreg, implicit-def $scc, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99 ; GFX10-NEXT: $sgpr97 = S_ADDC_U32 $sgpr97, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99 @@ -1962,6 +2011,8 @@ body: | ; GFX942-LABEL: name: v_add_co_u32_e64_fi_sgpr_clobbered_register ; GFX942: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C ; GFX942-NEXT: {{ $}} + ; GFX942-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX942-NEXT: renamable $sgpr0 = S_LSHL_B32 renamable $sgpr6, 2, implicit-def dead $scc ; GFX942-NEXT: $vgpr1 = V_MOV_B32_e32 32772, implicit $exec ; GFX942-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 killed $vgpr1, killed $sgpr0, 0, implicit $exec @@ -1971,6 +2022,8 @@ body: | ; GFX11-LABEL: name: v_add_co_u32_e64_fi_sgpr_clobbered_register ; GFX11: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C ; GFX11-NEXT: {{ $}} + ; GFX11-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11-NEXT: renamable $sgpr0 = S_LSHL_B32 renamable $sgpr6, 2, implicit-def dead $scc ; GFX11-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 32772, killed $sgpr0, 0, implicit $exec ; GFX11-NEXT: renamable $vgpr0 = BUFFER_LOAD_DWORD_OFFEN killed renamable $vgpr0, $sgpr96_sgpr97_sgpr98_sgpr99, 0, 0, 0, 0, implicit $exec :: (load (s32), addrspace 5) @@ -1979,6 +2032,8 @@ body: | ; GFX12-LABEL: name: v_add_co_u32_e64_fi_sgpr_clobbered_register ; GFX12: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C ; GFX12-NEXT: {{ $}} + ; GFX12-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX12-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX12-NEXT: renamable $sgpr0 = S_LSHL_B32 renamable $sgpr6, 2, implicit-def dead $scc ; GFX12-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 32768, killed $sgpr0, 0, implicit $exec ; GFX12-NEXT: renamable $vgpr0 = BUFFER_LOAD_DWORD_OFFEN killed renamable $vgpr0, $sgpr96_sgpr97_sgpr98_sgpr99, 0, 0, 0, 0, implicit $exec :: (load (s32), addrspace 5) @@ -2007,6 +2062,8 @@ body: | ; GFX7-LABEL: name: v_add_co_u32_e64_sgpr_fi_clobbered_register ; GFX7: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX7-NEXT: {{ $}} + ; GFX7-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX7-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX7-NEXT: $sgpr8_sgpr9_sgpr10_sgpr11 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX7-NEXT: $sgpr8 = S_ADD_U32 $sgpr8, $noreg, implicit-def $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX7-NEXT: $sgpr9 = S_ADDC_U32 $sgpr9, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 @@ -2019,6 +2076,8 @@ body: | ; GFX8-LABEL: name: v_add_co_u32_e64_sgpr_fi_clobbered_register ; GFX8: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX8-NEXT: {{ $}} + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX8-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX8-NEXT: $sgpr8_sgpr9_sgpr10_sgpr11 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX8-NEXT: $sgpr8 = S_ADD_U32 $sgpr8, $noreg, implicit-def $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX8-NEXT: $sgpr9 = S_ADDC_U32 $sgpr9, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 @@ -2031,6 +2090,8 @@ body: | ; GFX900-LABEL: name: v_add_co_u32_e64_sgpr_fi_clobbered_register ; GFX900: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX900-NEXT: {{ $}} + ; GFX900-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX900-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX900-NEXT: $sgpr8_sgpr9_sgpr10_sgpr11 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX900-NEXT: $sgpr8 = S_ADD_U32 $sgpr8, $noreg, implicit-def $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX900-NEXT: $sgpr9 = S_ADDC_U32 $sgpr9, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 @@ -2043,6 +2104,8 @@ body: | ; GFX90A-LABEL: name: v_add_co_u32_e64_sgpr_fi_clobbered_register ; GFX90A: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A-NEXT: {{ $}} + ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX90A-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX90A-NEXT: $sgpr8_sgpr9_sgpr10_sgpr11 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A-NEXT: $sgpr8 = S_ADD_U32 $sgpr8, $noreg, implicit-def $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX90A-NEXT: $sgpr9 = S_ADDC_U32 $sgpr9, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11 @@ -2055,6 +2118,8 @@ body: | ; GFX10-LABEL: name: v_add_co_u32_e64_sgpr_fi_clobbered_register ; GFX10: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C, $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX10-NEXT: {{ $}} + ; GFX10-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX10-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX10-NEXT: $sgpr96_sgpr97_sgpr98_sgpr99 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX10-NEXT: $sgpr96 = S_ADD_U32 $sgpr96, $noreg, implicit-def $scc, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99 ; GFX10-NEXT: $sgpr97 = S_ADDC_U32 $sgpr97, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr96_sgpr97_sgpr98_sgpr99 @@ -2066,6 +2131,8 @@ body: | ; GFX942-LABEL: name: v_add_co_u32_e64_sgpr_fi_clobbered_register ; GFX942: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C ; GFX942-NEXT: {{ $}} + ; GFX942-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX942-NEXT: renamable $sgpr0 = S_LSHL_B32 renamable $sgpr6, 2, implicit-def dead $scc ; GFX942-NEXT: $vgpr1 = V_MOV_B32_e32 32772, implicit $exec ; GFX942-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 killed $vgpr1, killed $sgpr0, 0, implicit $exec @@ -2075,6 +2142,8 @@ body: | ; GFX11-LABEL: name: v_add_co_u32_e64_sgpr_fi_clobbered_register ; GFX11: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C ; GFX11-NEXT: {{ $}} + ; GFX11-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11-NEXT: renamable $sgpr0 = S_LSHL_B32 renamable $sgpr6, 2, implicit-def dead $scc ; GFX11-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 32772, killed $sgpr0, 0, implicit $exec ; GFX11-NEXT: renamable $vgpr0 = BUFFER_LOAD_DWORD_OFFEN killed renamable $vgpr0, $sgpr96_sgpr97_sgpr98_sgpr99, 0, 0, 0, 0, implicit $exec :: (load (s32), addrspace 5) @@ -2083,6 +2152,8 @@ body: | ; GFX12-LABEL: name: v_add_co_u32_e64_sgpr_fi_clobbered_register ; GFX12: liveins: $sgpr2_sgpr3, $sgpr4_sgpr5_sgpr6_sgpr7:0x000000000000003C ; GFX12-NEXT: {{ $}} + ; GFX12-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX12-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX12-NEXT: renamable $sgpr0 = S_LSHL_B32 renamable $sgpr6, 2, implicit-def dead $scc ; GFX12-NEXT: renamable $vgpr0, dead renamable $vcc = V_ADD_CO_U32_e64 32768, killed $sgpr0, 0, implicit $exec ; GFX12-NEXT: renamable $vgpr0 = BUFFER_LOAD_DWORD_OFFEN killed renamable $vgpr0, $sgpr96_sgpr97_sgpr98_sgpr99, 0, 0, 0, 0, implicit $exec :: (load (s32), addrspace 5) diff --git a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir index b1ebb298ac5c7..c5c9696ee355a 100644 --- a/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir +++ b/llvm/test/CodeGen/AMDGPU/eliminate-frame-index-v-add-u32.mir @@ -6,49 +6,6 @@ # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=FLATSCRW32 %s # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 -verify-machineinstrs -run-pass=prologepilog %s -o - | FileCheck -check-prefix=FLATSCRW32 %s ---- | - define void @v_add_u32_e32__inline_imm__fi_offset0() #0 { unreachable } - define void @v_add_u32_e32__inline_imm___fi_offset_inline_imm() #0 { unreachable } - define void @v_add_u32_e32__literal__fi_offset0() #0 { unreachable } - define void @v_add_u32_e32__literal__fi_offset0__offset_inlineimm() #0 { unreachable } - define void @v_add_u32_e32__vgpr__fi_offset0() #0 { unreachable } - define void @v_add_u32_e32__fi_offset0__vgpr() #0 { unreachable } - define void @v_add_u32_e32__vgpr__fi_literal_offset() #0 { unreachable } - define void @v_add_u32_e32__fi_literal_offset__vgpr() #0 { unreachable } - define void @v_add_u32_e32__sgpr__fi_literal_offset() #0 { unreachable } - define void @v_add_u32_e64__inline_imm__fi_offset0() #0 { unreachable } - define void @v_add_u32_e64__fi_literal_offset__sgpr() #0 { unreachable } - define void @v_add_u32_e64__vgpr__fi_literal_offset() #0 { unreachable } - define void @v_add_u32_e64__vgpr__fi_literal_offset__clamp() #0 { unreachable } - define void @v_add_u32_e64__fi_literal_offset__vgpr__clamp() #0 { unreachable } - define void @v_add_u32_e64__fi_literal_offset__vgpr__clamp__kernel() #0 { unreachable } - define void @v_add_u32_e32__inline_imm__fi_offset0__kernel() #0 { unreachable } - define void @v_add_u32_e64__inline_imm__fi_offset0__kernel() #0 { unreachable } - define void @v_add_u32_e32__inline_imm__fi_literal__kernel() #0 { unreachable } - define void @v_add_u32_e64__inline_imm__fi_literal__kernel() #0 { unreachable } - define void @v_add_u32_e64__fi_literal__inline_imm__kernel() #0 { unreachable } - define void @v_add_u32_e64__inline_imm__fi_literal__kernel__clamp() #0 { unreachable } - define void @killed_reg_regression() #0 { unreachable } - define void @v_add_u32_e32__kernel_fi_offset0__other_vgpr_live_after() #0 { unreachable } - define void @v_add_u32_e32__kernel_other_vgpr_live_after__fi_offset0() #0 { unreachable } - define void @v_add_u32_e32__kernel_fi_offset0__sgpr_live_after() #0 { unreachable } - define void @v_add_u32_e64__kernel_fi_offset0__other_vgpr_live_after() #0 { unreachable } - define void @v_add_u32_e32__kernel_fi_offset72__sgpr_live_after() #0 { unreachable } - define void @v_add_u32_e64__kernel_fi_offset72__sgpr_live_after() #0 { unreachable } - define void @v_add_u32_e32__identity_vgpr__fi_offset0__kernel() #0 { unreachable } - define void @v_add_u32_e32__fi_offset0__identity_vgpr__kernel() #0 { unreachable } - define void @v_add_u32_e64__identity_vgpr__fi_offset0__kernel() #0 { unreachable } - define void @v_add_u32_e64__fi_offset0__identity_vgpr__kernel() #0 { unreachable } - define void @v_add_u32_e32__fi_offset0__identity_vgpr__kernel_kill() #0 { unreachable } - define void @v_add_u32_e32__identity_vgpr__fi_offset32__kernel() #0 { unreachable } - define void @v_add_u32_e32__identity_vgpr__fi_offset72__kernel() #0 { unreachable } - define void @v_add_u32_e32__fi_offset72__identity_vgpr__kernel() #0 { unreachable } - define void @v_add_u32_e32__fi_offset32__identity_vgpr__kernel() #0 { unreachable } - define void @v_add_u32_e64__identity_vgpr__fi_offset32__kernel() #0 { unreachable } - define void @v_add_u32_e64_imm_fi_vop3_literal_error() #0 { unreachable } - attributes #0 = { nounwind } -... ---- --- name: v_add_u32_e32__inline_imm__fi_offset0 tracksRegLiveness: true @@ -665,6 +622,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__fi_literal_offset__vgpr__clamp__kernel ; MUBUF: liveins: $vgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec @@ -674,6 +633,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__fi_literal_offset__vgpr__clamp__kernel ; MUBUFW32: liveins: $vgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 128, $vgpr8, 1, implicit $exec @@ -682,6 +643,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e64__fi_literal_offset__vgpr__clamp__kernel ; FLATSCRW64: liveins: $vgpr8 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 128, implicit $exec ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e64 killed $vgpr1, $vgpr8, 1, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 @@ -689,6 +652,8 @@ body: | ; FLATSCRW32-LABEL: name: v_add_u32_e64__fi_literal_offset__vgpr__clamp__kernel ; FLATSCRW32: liveins: $vgpr8 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 128, $vgpr8, 1, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e64 %stack.1, $vgpr8, 1, implicit $exec @@ -711,6 +676,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__inline_imm__fi_offset0__kernel ; MUBUF: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec @@ -719,17 +686,23 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__inline_imm__fi_offset0__kernel ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW64-LABEL: name: v_add_u32_e32__inline_imm__fi_offset0__kernel - ; FLATSCRW64: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__inline_imm__fi_offset0__kernel - ; FLATSCRW32: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e32 12, %stack.0, implicit $exec SI_RETURN implicit $vgpr0 @@ -751,6 +724,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__inline_imm__fi_offset0__kernel ; MUBUF: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec @@ -759,17 +734,23 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__inline_imm__fi_offset0__kernel ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW64-LABEL: name: v_add_u32_e64__inline_imm__fi_offset0__kernel - ; FLATSCRW64: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e64__inline_imm__fi_offset0__kernel - ; FLATSCRW32: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 12, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e64 12, %stack.0, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -794,6 +775,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__inline_imm__fi_literal__kernel ; MUBUF: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec @@ -802,17 +785,23 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__inline_imm__fi_literal__kernel ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW64-LABEL: name: v_add_u32_e32__inline_imm__fi_literal__kernel - ; FLATSCRW64: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__inline_imm__fi_literal__kernel - ; FLATSCRW32: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e32 12, %stack.1, implicit $exec SI_RETURN implicit $vgpr0 @@ -835,6 +824,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__inline_imm__fi_literal__kernel ; MUBUF: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec @@ -843,17 +834,23 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__inline_imm__fi_literal__kernel ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW64-LABEL: name: v_add_u32_e64__inline_imm__fi_literal__kernel - ; FLATSCRW64: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e64__inline_imm__fi_literal__kernel - ; FLATSCRW32: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e64 12, %stack.1, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -876,6 +873,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__fi_literal__inline_imm__kernel ; MUBUF: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec @@ -884,17 +883,23 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__fi_literal__inline_imm__kernel ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW64-LABEL: name: v_add_u32_e64__fi_literal__inline_imm__kernel - ; FLATSCRW64: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e64__fi_literal__inline_imm__kernel - ; FLATSCRW32: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 44, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e64 %stack.1, 12, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -917,6 +922,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__inline_imm__fi_literal__kernel__clamp ; MUBUF: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e64 44, 0, 1, implicit $exec @@ -925,17 +932,23 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__inline_imm__fi_literal__kernel__clamp ; MUBUFW32: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 44, 0, 1, implicit $exec ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW64-LABEL: name: v_add_u32_e64__inline_imm__fi_literal__kernel__clamp - ; FLATSCRW64: renamable $vgpr0 = V_ADD_U32_e64 44, 0, 1, implicit $exec + ; FLATSCRW64: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e64 44, 0, 1, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e64__inline_imm__fi_literal__kernel__clamp - ; FLATSCRW32: renamable $vgpr0 = V_ADD_U32_e64 44, 0, 1, implicit $exec + ; FLATSCRW32: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg + ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 44, 0, 1, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e64 12, %stack.1, 1, implicit $exec SI_RETURN implicit $vgpr0 @@ -960,6 +973,8 @@ body: | ; MUBUF-LABEL: name: killed_reg_regression ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_LSHLREV_B32_e32 2, killed $vgpr0, implicit $exec @@ -973,6 +988,8 @@ body: | ; MUBUFW32-LABEL: name: killed_reg_regression ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_LSHLREV_B32_e32 2, killed $vgpr0, implicit $exec @@ -986,6 +1003,8 @@ body: | ; FLATSCRW64-LABEL: name: killed_reg_regression ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_LSHLREV_B32_e32 2, killed $vgpr0, implicit $exec ; FLATSCRW64-NEXT: renamable $vgpr1 = V_MOV_B32_e32 $vgpr0, implicit $exec ; FLATSCRW64-NEXT: renamable $vgpr2 = V_MOV_B32_e32 15, implicit $exec @@ -997,6 +1016,8 @@ body: | ; FLATSCRW32-LABEL: name: killed_reg_regression ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_LSHLREV_B32_e32 2, killed $vgpr0, implicit $exec ; FLATSCRW32-NEXT: renamable $vgpr1 = V_MOV_B32_e32 $vgpr0, implicit $exec ; FLATSCRW32-NEXT: renamable $vgpr2 = V_MOV_B32_e32 15, implicit $exec @@ -1030,6 +1051,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__kernel_fi_offset0__other_vgpr_live_after ; MUBUF: liveins: $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec @@ -1038,6 +1061,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__kernel_fi_offset0__other_vgpr_live_after ; MUBUFW32: liveins: $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec @@ -1046,12 +1071,16 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__kernel_fi_offset0__other_vgpr_live_after ; FLATSCRW64: liveins: $vgpr1 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__kernel_fi_offset0__other_vgpr_live_after ; FLATSCRW32: liveins: $vgpr1 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 renamable $vgpr0 = V_ADD_U32_e32 renamable $vgpr1, %stack.0, implicit $exec @@ -1075,6 +1104,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__kernel_other_vgpr_live_after__fi_offset0 ; MUBUF: liveins: $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec @@ -1083,6 +1114,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__kernel_other_vgpr_live_after__fi_offset0 ; MUBUFW32: liveins: $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec @@ -1091,12 +1124,16 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__kernel_other_vgpr_live_after__fi_offset0 ; FLATSCRW64: liveins: $vgpr1 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__kernel_other_vgpr_live_after__fi_offset0 ; FLATSCRW32: liveins: $vgpr1 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 renamable $vgpr0 = V_ADD_U32_e32 %stack.0, renamable $vgpr1, implicit $exec @@ -1120,6 +1157,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__kernel_fi_offset0__sgpr_live_after ; MUBUF: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $sgpr8, implicit $exec @@ -1128,6 +1167,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__kernel_fi_offset0__sgpr_live_after ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $sgpr8, implicit $exec @@ -1136,12 +1177,16 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__kernel_fi_offset0__sgpr_live_after ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $sgpr8, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__kernel_fi_offset0__sgpr_live_after ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $sgpr8, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8 renamable $vgpr0 = V_ADD_U32_e32 renamable $sgpr8, %stack.0, implicit $exec @@ -1165,6 +1210,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__kernel_fi_offset0__other_vgpr_live_after ; MUBUF: liveins: $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec @@ -1173,6 +1220,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__kernel_fi_offset0__other_vgpr_live_after ; MUBUFW32: liveins: $vgpr1, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec @@ -1181,12 +1230,16 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e64__kernel_fi_offset0__other_vgpr_live_after ; FLATSCRW64: liveins: $vgpr1 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 ; ; FLATSCRW32-LABEL: name: v_add_u32_e64__kernel_fi_offset0__other_vgpr_live_after ; FLATSCRW32: liveins: $vgpr1 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1 renamable $vgpr0 = V_ADD_U32_e64 renamable $vgpr1, %stack.0, 0, implicit $exec @@ -1211,6 +1264,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__kernel_fi_offset72__sgpr_live_after ; MUBUF: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec @@ -1220,6 +1275,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__kernel_fi_offset72__sgpr_live_after ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec @@ -1229,6 +1286,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__kernel_fi_offset72__sgpr_live_after ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $sgpr8, killed $vgpr1, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8 @@ -1236,6 +1295,8 @@ body: | ; FLATSCRW32-LABEL: name: v_add_u32_e32__kernel_fi_offset72__sgpr_live_after ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 $sgpr8, killed $vgpr1, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8 @@ -1261,6 +1322,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__kernel_fi_offset72__sgpr_live_after ; MUBUF: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec @@ -1270,6 +1333,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__kernel_fi_offset72__sgpr_live_after ; MUBUFW32: liveins: $sgpr8, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $sgpr8, 72, 0, implicit $exec @@ -1278,6 +1343,8 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e64__kernel_fi_offset72__sgpr_live_after ; FLATSCRW64: liveins: $sgpr8 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: $vgpr1 = V_MOV_B32_e32 72, implicit $exec ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e64 killed $vgpr1, $sgpr8, 0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8 @@ -1285,6 +1352,8 @@ body: | ; FLATSCRW32-LABEL: name: v_add_u32_e64__kernel_fi_offset72__sgpr_live_after ; FLATSCRW32: liveins: $sgpr8 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $sgpr8, 72, 0, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0, implicit $sgpr8 renamable $vgpr0 = V_ADD_U32_e64 renamable $sgpr8, %stack.1, 0, implicit $exec @@ -1309,6 +1378,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset0__kernel ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: SI_RETURN implicit $vgpr0 @@ -1316,6 +1387,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset0__kernel ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 @@ -1323,11 +1396,15 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset0__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset0__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e32 $vgpr0, %stack.0, implicit $exec SI_RETURN implicit $vgpr0 @@ -1350,6 +1427,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__fi_offset0__identity_vgpr__kernel ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: SI_RETURN implicit $vgpr0 @@ -1357,6 +1436,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__fi_offset0__identity_vgpr__kernel ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 @@ -1364,11 +1445,15 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__fi_offset0__identity_vgpr__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__fi_offset0__identity_vgpr__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e32 %stack.0, $vgpr0, implicit $exec SI_RETURN implicit $vgpr0 @@ -1392,6 +1477,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__identity_vgpr__fi_offset0__kernel ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: SI_RETURN implicit $vgpr0 @@ -1399,6 +1486,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__identity_vgpr__fi_offset0__kernel ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 @@ -1406,11 +1495,15 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e64__identity_vgpr__fi_offset0__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e64__identity_vgpr__fi_offset0__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e64 $vgpr0, %stack.0, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -1434,6 +1527,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__fi_offset0__identity_vgpr__kernel ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: SI_RETURN implicit $vgpr0 @@ -1441,6 +1536,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__fi_offset0__identity_vgpr__kernel ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 @@ -1448,11 +1545,15 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e64__fi_offset0__identity_vgpr__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e64__fi_offset0__identity_vgpr__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e64 %stack.0, $vgpr0, 0, implicit $exec SI_RETURN implicit $vgpr0 @@ -1475,6 +1576,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__fi_offset0__identity_vgpr__kernel_kill ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: SI_RETURN implicit $vgpr0 @@ -1482,6 +1585,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__fi_offset0__identity_vgpr__kernel_kill ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: SI_RETURN implicit $vgpr0 @@ -1489,11 +1594,15 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__fi_offset0__identity_vgpr__kernel_kill ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__fi_offset0__identity_vgpr__kernel_kill ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e32 %stack.0, killed $vgpr0, implicit $exec SI_RETURN implicit $vgpr0 @@ -1518,6 +1627,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset32__kernel ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e32 32, $vgpr0, implicit $exec @@ -1526,6 +1637,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset32__kernel ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 32, $vgpr0, implicit $exec @@ -1534,12 +1647,16 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset32__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 32, $vgpr0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset32__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 32, $vgpr0, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e32 $vgpr0, %stack.1, implicit $exec @@ -1566,6 +1683,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset72__kernel ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, $vgpr0, implicit $exec @@ -1574,6 +1693,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset72__kernel ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, $vgpr0, implicit $exec @@ -1582,12 +1703,16 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset72__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, $vgpr0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__identity_vgpr__fi_offset72__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, $vgpr0, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e32 $vgpr0, %stack.1, implicit $exec @@ -1613,6 +1738,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__fi_offset72__identity_vgpr__kernel ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, $vgpr0, implicit $exec @@ -1621,6 +1748,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__fi_offset72__identity_vgpr__kernel ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, $vgpr0, implicit $exec @@ -1629,12 +1758,16 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__fi_offset72__identity_vgpr__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, $vgpr0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__fi_offset72__identity_vgpr__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 72, $vgpr0, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e32 %stack.1, $vgpr0, implicit $exec @@ -1660,6 +1793,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e32__fi_offset32__identity_vgpr__kernel ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e32 32, $vgpr0, implicit $exec @@ -1668,6 +1803,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e32__fi_offset32__identity_vgpr__kernel ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 32, $vgpr0, implicit $exec @@ -1676,12 +1813,16 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e32__fi_offset32__identity_vgpr__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e32 32, $vgpr0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e32__fi_offset32__identity_vgpr__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e32 32, $vgpr0, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e32 %stack.1, $vgpr0, implicit $exec @@ -1707,6 +1848,8 @@ body: | ; MUBUF-LABEL: name: v_add_u32_e64__identity_vgpr__fi_offset32__kernel ; MUBUF: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: {{ $}} + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUF-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUF-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUF-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $vgpr0, 32, 0, implicit $exec @@ -1715,6 +1858,8 @@ body: | ; MUBUFW32-LABEL: name: v_add_u32_e64__identity_vgpr__fi_offset32__kernel ; MUBUFW32: liveins: $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: {{ $}} + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; MUBUFW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; MUBUFW32-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, $noreg, implicit-def $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; MUBUFW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $vgpr0, 32, 0, implicit $exec @@ -1723,12 +1868,16 @@ body: | ; FLATSCRW64-LABEL: name: v_add_u32_e64__identity_vgpr__fi_offset32__kernel ; FLATSCRW64: liveins: $vgpr0 ; FLATSCRW64-NEXT: {{ $}} + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW64-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW64-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $vgpr0, 32, 0, implicit $exec ; FLATSCRW64-NEXT: SI_RETURN implicit $vgpr0 ; ; FLATSCRW32-LABEL: name: v_add_u32_e64__identity_vgpr__fi_offset32__kernel ; FLATSCRW32: liveins: $vgpr0 ; FLATSCRW32-NEXT: {{ $}} + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; FLATSCRW32-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; FLATSCRW32-NEXT: renamable $vgpr0 = V_ADD_U32_e64 $vgpr0, 32, 0, implicit $exec ; FLATSCRW32-NEXT: SI_RETURN implicit $vgpr0 renamable $vgpr0 = V_ADD_U32_e64 $vgpr0, %stack.1, 0, implicit $exec diff --git a/llvm/test/CodeGen/AMDGPU/frame-index-elimination-tied-operand.mir b/llvm/test/CodeGen/AMDGPU/frame-index-elimination-tied-operand.mir index b4a9e3a16136a..e861a15981186 100644 --- a/llvm/test/CodeGen/AMDGPU/frame-index-elimination-tied-operand.mir +++ b/llvm/test/CodeGen/AMDGPU/frame-index-elimination-tied-operand.mir @@ -1,15 +1,7 @@ # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -run-pass=prologepilog -o - %s | FileCheck -check-prefix=GFX11 %s - ---- | - define void @tied_operand_test() #0 { - entry: - unreachable - } - attributes #0 = { nounwind } ... --- ---- name: tied_operand_test tracksRegLiveness: true stack: @@ -29,6 +21,8 @@ body: | ; GFX11-LABEL: name: tied_operand_test ; GFX11: liveins: $sgpr0_sgpr1 ; GFX11-NEXT: {{ $}} + ; GFX11-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; GFX11-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; GFX11-NEXT: renamable $vgpr0 = V_MOV_B32_e32 123, implicit $exec ; GFX11-NEXT: renamable $vgpr0 = SCRATCH_LOAD_SHORT_D16_HI_ST 0, 0, killed renamable $vgpr0, implicit $exec, implicit $flat_scr ; GFX11-NEXT: renamable $sgpr0 = S_LOAD_DWORD_IMM killed renamable $sgpr0_sgpr1, 4, 0 diff --git a/llvm/test/CodeGen/AMDGPU/inflate-av-remat-imm.mir b/llvm/test/CodeGen/AMDGPU/inflate-av-remat-imm.mir index 7cdb7c4ff1a9c..2872cfd212273 100644 --- a/llvm/test/CodeGen/AMDGPU/inflate-av-remat-imm.mir +++ b/llvm/test/CodeGen/AMDGPU/inflate-av-remat-imm.mir @@ -4,13 +4,6 @@ # Compare results of using V_MOV_B32 vs. AV_MOV_B32_IMM_PSEUDO during # allocation. ---- | - define void @av_mov_b32_split() #0 { unreachable } - define void @v_mov_b32_split() #0 { unreachable } - define void @av_mov_b64_split() #0 { unreachable } - attributes #0 = { nounwind } -... ---- --- name: av_mov_b32_split tracksRegLiveness: true @@ -26,6 +19,8 @@ body: | ; CHECK-LABEL: name: av_mov_b32_split ; CHECK: liveins: $agpr3, $agpr4, $vgpr0, $sgpr4_sgpr5 ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: renamable $agpr0 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec ; CHECK-NEXT: renamable $agpr1 = V_ACCVGPR_WRITE_B32_e64 1, implicit $exec ; CHECK-NEXT: renamable $agpr2 = V_ACCVGPR_WRITE_B32_e64 2, implicit $exec @@ -75,6 +70,8 @@ body: | ; CHECK-LABEL: name: v_mov_b32_split ; CHECK: liveins: $agpr3, $agpr4, $vgpr0, $sgpr4_sgpr5 ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: renamable $vgpr0 = V_MOV_B32_e32 0, implicit $exec ; CHECK-NEXT: renamable $vgpr1 = V_MOV_B32_e32 1, implicit $exec ; CHECK-NEXT: renamable $vgpr2 = V_MOV_B32_e32 2, implicit $exec @@ -127,6 +124,8 @@ body: | ; CHECK-LABEL: name: av_mov_b64_split ; CHECK: liveins: $agpr6, $agpr7, $agpr8, $agpr9, $vgpr0, $sgpr4_sgpr5 ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: $agpr0 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec, implicit-def $agpr0_agpr1 ; CHECK-NEXT: $agpr1 = V_ACCVGPR_WRITE_B32_e64 0, implicit $exec, implicit-def $agpr0_agpr1 ; CHECK-NEXT: $agpr2 = V_ACCVGPR_WRITE_B32_e64 1, implicit $exec, implicit-def $agpr2_agpr3 diff --git a/llvm/test/CodeGen/AMDGPU/issue98474-assigned-physreg-interference.mir b/llvm/test/CodeGen/AMDGPU/issue98474-assigned-physreg-interference.mir index ce1e8efb06435..e44736584767b 100644 --- a/llvm/test/CodeGen/AMDGPU/issue98474-assigned-physreg-interference.mir +++ b/llvm/test/CodeGen/AMDGPU/issue98474-assigned-physreg-interference.mir @@ -1,11 +1,6 @@ # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5 # RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 -start-before=greedy,2 -stop-after=tailduplication -verify-machineinstrs -o - %s | FileCheck %s ---- | - define void @undef_subreg_def_live_out_tailduplicate_vreg96_undef_sub1_sub2_assigned_physreg_interference() #0 { unreachable } - attributes #0 = { nounwind } -... ---- --- name: undef_subreg_def_live_out_tailduplicate_vreg96_undef_sub1_sub2_assigned_physreg_interference tracksRegLiveness: true @@ -19,6 +14,8 @@ body: | ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) ; CHECK-NEXT: liveins: $sgpr0, $vgpr2 ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: S_CMP_EQ_U32 $sgpr0, 0, implicit-def $scc ; CHECK-NEXT: S_CBRANCH_SCC0 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} diff --git a/llvm/test/CodeGen/AMDGPU/issue98474-virtregrewriter-live-out-undef-subregisters.mir b/llvm/test/CodeGen/AMDGPU/issue98474-virtregrewriter-live-out-undef-subregisters.mir index eeb0c56fbb8e7..a244a433a4efb 100644 --- a/llvm/test/CodeGen/AMDGPU/issue98474-virtregrewriter-live-out-undef-subregisters.mir +++ b/llvm/test/CodeGen/AMDGPU/issue98474-virtregrewriter-live-out-undef-subregisters.mir @@ -6,16 +6,6 @@ # the physical subregister. Without this, a verifier error would # appear after tail duplication. ---- | - define void @undef_subreg_def_live_out_tailduplicate_vreg64_undef_sub1() #0 { unreachable } - define void @undef_subreg_def_live_out_tailduplicate_vreg96_undef_sub1_sub2() #0 { unreachable } - define void @undef_subreg_def_live_out_tailduplicate_vreg96_undef_sub0_sub2() #0 { unreachable } - define void @undef_subreg_def_live_out_tailduplicate_vreg64_undef_sub1_undef_use_in_def_block() #0 { unreachable } - define void @undef_subreg_def_live_out_tailduplicate_vreg64_undef_sub1_no_phi_use() #0 { unreachable } - define void @assigned_physreg_subregister_interference() #0 { unreachable } - attributes #0 = { nounwind } -... ---- --- name: undef_subreg_def_live_out_tailduplicate_vreg64_undef_sub1 tracksRegLiveness: true @@ -29,6 +19,8 @@ body: | ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) ; CHECK-NEXT: liveins: $sgpr0 ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: S_CMP_EQ_U32 $sgpr0, 0, implicit-def $scc ; CHECK-NEXT: S_CBRANCH_SCC0 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} @@ -77,6 +69,8 @@ body: | ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) ; CHECK-NEXT: liveins: $sgpr0 ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: S_CMP_EQ_U32 $sgpr0, 0, implicit-def $scc ; CHECK-NEXT: S_CBRANCH_SCC0 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} @@ -125,6 +119,8 @@ body: | ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) ; CHECK-NEXT: liveins: $sgpr0 ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: S_CMP_EQ_U32 $sgpr0, 0, implicit-def $scc ; CHECK-NEXT: S_CBRANCH_SCC0 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} @@ -174,6 +170,8 @@ body: | ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) ; CHECK-NEXT: liveins: $sgpr0 ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: S_CMP_EQ_U32 $sgpr0, 0, implicit-def $scc ; CHECK-NEXT: S_CBRANCH_SCC0 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}} @@ -225,6 +223,8 @@ body: | ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) ; CHECK-NEXT: liveins: $sgpr0 ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x04, 0x30, 0x36, 0xe9, 0x02 + ; CHECK-NEXT: frame-setup CFI_INSTRUCTION undefined $pc_reg ; CHECK-NEXT: S_CMP_EQ_U32 $sgpr0, 0, implicit-def $scc ; CHECK-NEXT: S_CBRANCH_SCC0 %bb.2, implicit killed $scc ; CHECK-NEXT: {{ $}}