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Merge remote-tracking branch 'adafruit/main' into wifi-power-management
2 parents b1ce99a + b2c338b commit 7d65991

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29 files changed

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‎locale/circuitpython.pot‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2595,6 +2595,11 @@ msgstr ""
25952595
#: shared-bindings/audiodelays/MultiTapDelay.c
25962596
#: shared-bindings/audiodelays/PitchShift.c
25972597
#: shared-bindings/audiofilters/Distortion.c
2598+
#: shared-bindings/audiodelays/Reverb.c
2599+
msgid "bits_per_sample must be 16"
2600+
msgstr ""
2601+
2602+
#: shared-bindings/audiodelays/Echo.c shared-bindings/audiofilters/Distortion.c
25982603
#: shared-bindings/audiofilters/Filter.c shared-bindings/audiomixer/Mixer.c
25992604
msgid "bits_per_sample must be 8 or 16"
26002605
msgstr ""
@@ -4012,6 +4017,10 @@ msgstr ""
40124017
msgid "rsplit(None,n)"
40134018
msgstr ""
40144019

4020+
#: shared-bindings/audiodelays/Reverb.c
4021+
msgid "samples_signed must be true"
4022+
msgstr ""
4023+
40154024
#: ports/atmel-samd/common-hal/audiobusio/PDMIn.c
40164025
#: ports/raspberrypi/common-hal/audiobusio/PDMIn.c
40174026
msgid "sampling rate out of range"

‎ports/raspberrypi/bindings/rp2pio/StateMachine.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -29,8 +29,8 @@
2929
//| """A type representing one of the strings ``"auto"``, ``"txrx"``, ``"tx"``, or ``"rx"``. These values are supported on both RP2350 and RP2040. For type-checking only, not actually defined in CircuitPython."""
3030
//| MovStatusType = Literal["txfifo", "rxfifo", "irq"]
3131
//| """A type representing one of the strings ``"txfifo"``, ``"rxfifo"``, or ``"irq"``. These values are supported on RP2350. For type-checking only, not actually defined in CircuitPython."""
32-
//| MovStatusType_piov0 = Literal["txfifo"]
33-
//| """A type representing the string ``"txfifo"``. This value is supported on RP2350 and RP2040. For type-checking only, not actually defined in CircuitPython."""
32+
//| MovStatusType_piov0 = Literal["txfifo", "rxfifo"]
33+
//| """A type representing one of the strings ``"txfifo"``, ``"rxfifo"``. These values are supported on RP2350 and RP2040. For type-checking only, not actually defined in CircuitPython."""
3434
//|
3535
//|
3636
//| class StateMachine:

‎ports/raspberrypi/common-hal/audiobusio/I2SOut.c‎

Lines changed: 134 additions & 104 deletions
Original file line numberDiff line numberDiff line change
@@ -19,122 +19,152 @@
1919
#include "bindings/rp2pio/StateMachine.h"
2020

2121
const uint16_t i2s_program[] = {
22-
// ; Load the next set of samples
23-
// ; /--- LRCLK
24-
// ; |/-- BCLK
25-
// ; ||
26-
// pull noblock side 0b01 ; Loads OSR with the next FIFO value or X
27-
0x8880,
28-
// mov x osr side 0b01 ; Save the new value in case we need it again
29-
0xa827,
30-
// set y 14 side 0b01
31-
0xe84e,
32-
// bitloop1:
33-
// out pins 1 side 0b00 [2]
34-
0x6201,
35-
// jmp y-- bitloop1 side 0b01 [2]
36-
0x0a83,
37-
// out pins 1 side 0b10 [2]
38-
0x7201,
39-
// set y 14 side 0b11 [2]
40-
0xfa4e,
41-
// bitloop0:
42-
// out pins 1 side 0b10 [2]
43-
0x7201,
44-
// jmp y-- bitloop0 side 0b11 [2]
45-
0x1a87,
46-
// out pins 1 side 0b00 [2]
47-
0x6201
22+
23+
/* From i2s.pio:
24+
25+
.program i2s
26+
.side_set 2
27+
28+
; Load the next set of samples
29+
; /--- LRCLK
30+
; |/-- BCLK
31+
; ||
32+
pull noblock side 0b11 ; Loads OSR with the next FIFO value or X
33+
mov x osr side 0b11 ; Save the new value in case we need it again
34+
set y 14 side 0b11
35+
bitloop1:
36+
out pins 1 side 0b10 [2] ; Right channel first
37+
jmp y-- bitloop1 side 0b11 [2]
38+
out pins 1 side 0b00 [2]
39+
set y 14 side 0b01 [2]
40+
bitloop0:
41+
out pins 1 side 0b00 [2] ; Then left channel
42+
jmp y-- bitloop0 side 0b01 [2]
43+
out pins 1 side 0b10 [2]
44+
*/
45+
// Above assembled with pioasm.
46+
0x9880, // 0: pull noblock side 3
47+
0xb827, // 1: mov x, osr side 3
48+
0xf84e, // 2: set y, 14 side 3
49+
0x7201, // 3: out pins, 1 side 2 [2]
50+
0x1a83, // 4: jmp y--, 3 side 3 [2]
51+
0x6201, // 5: out pins, 1 side 0 [2]
52+
0xea4e, // 6: set y, 14 side 1 [2]
53+
0x6201, // 7: out pins, 1 side 0 [2]
54+
0x0a87, // 8: jmp y--, 7 side 1 [2]
55+
0x7201, // 9: out pins, 1 side 2 [2]
4856
};
4957

58+
5059
const uint16_t i2s_program_left_justified[] = {
51-
// ; Load the next set of samples
52-
// ; /--- LRCLK
53-
// ; |/-- BCLK
54-
// ; ||
55-
// pull noblock side 0b11 ; Loads OSR with the next FIFO value or X
56-
0x9880,
57-
// mov x osr side 0b11 ; Save the new value in case we need it again
58-
0xb827,
59-
// set y 14 side 0b11
60-
0xf84e,
61-
// bitloop1:
62-
// out pins 1 side 0b00 [2]
63-
0x6201,
64-
// jmp y-- bitloop1 side 0b01 [2]
65-
0x0a83,
66-
// out pins 1 side 0b00 [2]
67-
0x6201,
68-
// set y 14 side 0b01 [2]
69-
0xea4e,
70-
// bitloop0:
71-
// out pins 1 side 0b10 [2]
72-
0x7201,
73-
// jmp y-- bitloop0 side 0b11 [2]
74-
0x1a87,
75-
// out pins 1 side 0b10 [2]
76-
0x7201
60+
/* From i2s_left.pio:
61+
62+
.program i2s
63+
.side_set 2
64+
65+
; Load the next set of samples
66+
; /--- LRCLK
67+
; |/-- BCLK
68+
; ||
69+
pull noblock side 0b01 ; Loads OSR with the next FIFO value or X
70+
mov x osr side 0b01 ; Save the new value in case we need it again
71+
set y 14 side 0b01
72+
bitloop1:
73+
out pins 1 side 0b10 [2] ; Right channel first
74+
jmp y-- bitloop1 side 0b11 [2]
75+
out pins 1 side 0b10 [2]
76+
set y 14 side 0b11 [2]
77+
bitloop0:
78+
out pins 1 side 0b00 [2] ; Then left channel
79+
jmp y-- bitloop0 side 0b01 [2]
80+
out pins 1 side 0b00 [2]
81+
*/
82+
// Above assembled with pioasm.
83+
0x8880, // 0: pull noblock side 1
84+
0xa827, // 1: mov x, osr side 1
85+
0xe84e, // 2: set y, 14 side 1
86+
0x7201, // 3: out pins, 1 side 2 [2]
87+
0x1a83, // 4: jmp y--, 3 side 3 [2]
88+
0x7201, // 5: out pins, 1 side 2 [2]
89+
0xfa4e, // 6: set y, 14 side 3 [2]
90+
0x6201, // 7: out pins, 1 side 0 [2]
91+
0x0a87, // 8: jmp y--, 7 side 1 [2]
92+
0x6201, // 9: out pins, 1 side 0 [2]
7793
};
7894

7995
// Another version of i2s_program with the LRCLC and BCLK pin swapped
8096
const uint16_t i2s_program_swap[] = {
81-
// ; Load the next set of samples
82-
// ; /--- BCLK
83-
// ; |/-- LRCLK
84-
// ; ||
85-
// pull noblock side 0b11 ; Loads OSR with the next FIFO value or X
86-
0x9880,
87-
// mov x osr side 0b11 ; Save the new value in case we need it again
88-
0xb827,
89-
// set y 14 side 0b11
90-
0xf84e,
91-
// bitloop1:
92-
// out pins 1 side 0b01 [2]
93-
0x6a01,
94-
// jmp y-- bitloop1 side 0b11 [2]
95-
0x1a83,
96-
// out pins 1 side 0b00 [2]
97-
0x6201,
98-
// set y 14 side 0b10 [2]
99-
0xf24e,
100-
// bitloop0:
101-
// out pins 1 side 0b00 [2]
102-
0x6201,
103-
// jmp y-- bitloop0 side 0b10 [2]
104-
0x1287,
105-
// out pins 1 side 0b01 [2]
106-
0x6a01
97+
/* From i2s_swap.pio:
98+
99+
.program i2s
100+
.side_set 2
101+
102+
; Load the next set of samples
103+
; /--- BCLK
104+
; |/-- LRCLK
105+
; ||
106+
pull noblock side 0b11 ; Loads OSR with the next FIFO value or X
107+
mov x osr side 0b11 ; Save the new value in case we need it again
108+
set y 14 side 0b11
109+
bitloop1:
110+
out pins 1 side 0b01 [2] ; Right channel first
111+
jmp y-- bitloop1 side 0b11 [2]
112+
out pins 1 side 0b00 [2]
113+
set y 14 side 0b10 [2]
114+
bitloop0:
115+
out pins 1 side 0b00 [2] ; Then left channel
116+
jmp y-- bitloop0 side 0b10 [2]
117+
out pins 1 side 0b01 [2]
118+
*/
119+
// Above assembled with pioasm.
120+
0x9880, // 0: pull noblock side 3
121+
0xb827, // 1: mov x, osr side 3
122+
0xf84e, // 2: set y, 14 side 3
123+
0x6a01, // 3: out pins, 1 side 1 [2]
124+
0x1a83, // 4: jmp y--, 3 side 3 [2]
125+
0x6201, // 5: out pins, 1 side 0 [2]
126+
0xf24e, // 6: set y, 14 side 2 [2]
127+
0x6201, // 7: out pins, 1 side 0 [2]
128+
0x1287, // 8: jmp y--, 7 side 2 [2]
129+
0x6a01, // 9: out pins, 1 side 1 [2]
107130
};
108131

109132
// Another version of i2s_program_left_justified with the LRCLC and BCLK pin
110133
// swapped.
111134
const uint16_t i2s_program_left_justified_swap[] = {
112-
// ; Load the next set of samples
113-
// ; /--- BCLK
114-
// ; |/-- LRCLK
115-
// ; ||
116-
// pull noblock side 0b11 ; Loads OSR with the next FIFO value or X
117-
0x9880,
118-
// mov x osr side 0b11 ; Save the new value in case we need it again
119-
0xb827,
120-
// set y 14 side 0b11
121-
0xf84e,
122-
// bitloop1:
123-
// out pins 1 side 0b00 [2]
124-
0x6201,
125-
// jmp y-- bitloop1 side 0b10 [2]
126-
0x1283,
127-
// out pins 1 side 0b00 [2]
128-
0x6201,
129-
// set y 14 side 0b10 [2]
130-
0xf24e,
131-
// bitloop0:
132-
// out pins 1 side 0b01 [2]
133-
0x6a01,
134-
// jmp y-- bitloop0 side 0b11 [2]
135-
0x1a87,
136-
// out pins 1 side 0b01 [2]
137-
0x6a01
135+
/* From i2s_swap_left.pio:
136+
137+
.program i2s
138+
.side_set 2
139+
140+
; Load the next set of samples
141+
; /--- BCLK
142+
; |/-- LRCLK
143+
; ||
144+
pull noblock side 0b10 ; Loads OSR with the next FIFO value or X
145+
mov x osr side 0b10 ; Save the new value in case we need it again
146+
set y 14 side 0b10
147+
bitloop1:
148+
out pins 1 side 0b01 [2] ; Right channel first
149+
jmp y-- bitloop1 side 0b11 [2]
150+
out pins 1 side 0b01 [2]
151+
set y 14 side 0b11 [2]
152+
bitloop0:
153+
out pins 1 side 0b00 [2] ; Then left channel
154+
jmp y-- bitloop0 side 0b10 [2]
155+
out pins 1 side 0b00 [2]
156+
*/
157+
// Above assembled with pioasm.
158+
0x9080, // 0: pull noblock side 2
159+
0xb027, // 1: mov x, osr side 2
160+
0xf04e, // 2: set y, 14 side 2
161+
0x6a01, // 3: out pins, 1 side 1 [2]
162+
0x1a83, // 4: jmp y--, 3 side 3 [2]
163+
0x6a01, // 5: out pins, 1 side 1 [2]
164+
0xfa4e, // 6: set y, 14 side 3 [2]
165+
0x6201, // 7: out pins, 1 side 0 [2]
166+
0x1287, // 8: jmp y--, 7 side 2 [2]
167+
0x6201, // 9: out pins, 1 side 0 [2]
138168
};
139169

140170
void i2sout_reset(void) {

‎ports/raspberrypi/common-hal/audiobusio/README.pio‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,7 @@
1+
.pio files right now are compiled by hand with pico-sdk/tools/pioasm and inserted into I2SOut.c
2+
3+
i2s.pio regular pin order, not left_justified
4+
i2s_left.pio regular pin order, left_justified
5+
6+
i2s_swap.pio swapped pin order, not left_justified
7+
i2s_swap_left.pio swapped pin order, left_justified

‎ports/raspberrypi/common-hal/audiobusio/i2s.pio‎

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,25 @@
1+
; This file is part of the CircuitPython project: https://circuitpython.org
2+
;
3+
; SPDX-FileCopyrightText: Copyright (c) 2025 Dan Halbert for Adafruit Industries
4+
;
5+
; SPDX-License-Identifier: MIT
6+
7+
.program i2s
8+
.side_set 2
9+
10+
; Load the next set of samples
11+
; /--- LRCLK
12+
; |/-- BCLK
13+
; ||
14+
pull noblock side 0b11 ; Loads OSR with the next FIFO value or X
15+
mov x osr side 0b11 ; Save the new value in case we need it again
16+
set y 14 side 0b11
17+
bitloop1:
18+
out pins 1 side 0b10 [2] ; Right channel first
19+
jmp y-- bitloop1 side 0b11 [2]
20+
out pins 1 side 0b00 [2]
21+
set y 14 side 0b01 [2]
22+
bitloop0:
23+
out pins 1 side 0b00 [2] ; Then left channel
24+
jmp y-- bitloop0 side 0b01 [2]
25+
out pins 1 side 0b10 [2]

‎ports/raspberrypi/common-hal/audiobusio/i2s_left.pio‎

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,25 @@
1+
; This file is part of the CircuitPython project: https://circuitpython.org
2+
;
3+
; SPDX-FileCopyrightText: Copyright (c) 2025 Dan Halbert for Adafruit Industries
4+
;
5+
; SPDX-License-Identifier: MIT
6+
7+
.program i2s
8+
.side_set 2
9+
10+
; Load the next set of samples
11+
; /--- LRCLK
12+
; |/-- BCLK
13+
; ||
14+
pull noblock side 0b01 ; Loads OSR with the next FIFO value or X
15+
mov x osr side 0b01 ; Save the new value in case we need it again
16+
set y 14 side 0b01
17+
bitloop1:
18+
out pins 1 side 0b10 [2] ; Right channel first
19+
jmp y-- bitloop1 side 0b11 [2]
20+
out pins 1 side 0b10 [2]
21+
set y 14 side 0b11 [2]
22+
bitloop0:
23+
out pins 1 side 0b00 [2] ; Then left channel
24+
jmp y-- bitloop0 side 0b01 [2]
25+
out pins 1 side 0b00 [2]

‎ports/raspberrypi/common-hal/audiobusio/i2s_swap.pio‎

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,25 @@
1+
; This file is part of the CircuitPython project: https://circuitpython.org
2+
;
3+
; SPDX-FileCopyrightText: Copyright (c) 2025 Dan Halbert for Adafruit Industries
4+
;
5+
; SPDX-License-Identifier: MIT
6+
7+
.program i2s
8+
.side_set 2
9+
10+
; Load the next set of samples
11+
; /--- BCLK
12+
; |/-- LRCLK
13+
; ||
14+
pull noblock side 0b11 ; Loads OSR with the next FIFO value or X
15+
mov x osr side 0b11 ; Save the new value in case we need it again
16+
set y 14 side 0b11
17+
bitloop1:
18+
out pins 1 side 0b01 [2] ; Right channel first
19+
jmp y-- bitloop1 side 0b11 [2]
20+
out pins 1 side 0b00 [2]
21+
set y 14 side 0b10 [2]
22+
bitloop0:
23+
out pins 1 side 0b00 [2] ; Then left channel
24+
jmp y-- bitloop0 side 0b10 [2]
25+
out pins 1 side 0b01 [2]

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